Tristan Shieh 022f76b0d3 mediatek/mt8183: Init PLLs for DRAM ... Set up DRAM related PLLs. And update post divider table to fulfill all freqency settings. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui Change-Id: Ic197cef7d31f75ffe4e7d9e73c9cc544719943ab Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-on: https://review.coreboot.org/28667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com>		2018-10-10 12:16:43 +00:00
..
common	Move compiler.h to commonlib	2018-10-08 16:57:27 +00:00
mt8173	src: Use tabs for indentation	2018-10-08 09:46:16 +00:00
mt8183	mediatek/mt8183: Init PLLs for DRAM	2018-10-10 12:16:43 +00:00
Kconfig	soc: Add Kconfig for each soc vendor	2017-10-23 17:18:32 +00:00