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coreboot/src/include/cpu/intel
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Michał Żygowski 940d1d0868 soc/intel/cannonlake: Let coreboot lock MSR_IA32_DEBUG_INTERFACE 
Intel TXT requires the debug interface to be disabled. There is no
way to program the MSR_IA32_DEBUG_INTERFACE using FSP as needed, so
let coreboot handle it.

TEST=Boot Linux with tboot on Protectli VP4670 with Intel TXT enabled

Change-Id: I7ed4382bbe68f03e8eca151245c13928609f434f
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83730
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
2025-03-10 15:19:26 +00:00
..
cpu_ids.h soc/intel/xeon_sp/gnr: Move CPU ID definition to common header 2024-09-13 11:14:33 +00:00
em64t100_save_state.h src/include: Drop unneeded empty lines 2020-09-14 07:09:41 +00:00
em64t101_save_state.h src/include: Drop unneeded empty lines 2020-09-14 07:09:41 +00:00
fsb.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00
l2_cache.h src: Remove unnecessary semicolons from the end of macros 2023-11-10 15:27:45 +00:00
microcode.h cpu/intel/microcode: Have API to re-load microcode patch 2022-06-22 12:35:53 +00:00
msr.h soc/intel/cannonlake: Let coreboot lock MSR_IA32_DEBUG_INTERFACE 2025-03-10 15:19:26 +00:00
post_codes.h src/*/post_code.h: Change post code prefix to POSTCODE 2023-08-05 16:04:46 +00:00
smm_reloc.h mb/emulation/qemu-q35: Split smm_close() and smm_lock() 2022-11-17 07:42:55 +00:00
speedstep.h cpu/intel/speedstep: Have nb and sb code provide c5/c6/slfm 2022-12-05 14:22:12 +00:00
turbo.h treewide: Remove "this file is part of" lines 2020-05-11 17:11:40 +00:00