Martin Roth 8d936ce853 fsp_baytrail: update for UPD_SPD_CHECK macro ... Update chipset_fsp_util.c to use the UPD_SPD_CHECK macro. This makes the code more standardized and easier to read. Change-Id: I9944e1a4df82e64a205598e98ed0f3b840af1019 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7489 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)		2014-12-05 16:21:06 +01:00
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arch	x86: Update the check for Forbidden global variables	2014-12-05 09:20:41 +01:00
console	Add UCB RISCV support for architecture, soc, and emulation mainboard..	2014-12-01 19:06:43 +01:00
cpu	i945: Consolidate acpi/platform.asl	2014-12-03 21:02:50 +01:00
device	device/dram/ddr3.c: Fix sizeof on array func param overflow	2014-11-08 07:09:34 +01:00
drivers	drivers/intel/fsp: add upd macros and #defines	2014-12-05 16:19:45 +01:00
ec	Replace hlt with halt()	2014-12-02 10:25:55 +01:00
include	Replace hlt() loops with halt()	2014-11-30 12:20:07 +01:00
lib	RISCV: get RISCV to build again	2014-12-04 19:17:51 +01:00
mainboard	lenovo/g505s: Kconfig: Remove unused PIRQ legacy bits	2014-12-05 07:45:56 +01:00
northbridge	drivers/intel/fsp: add upd macros and #defines	2014-12-05 16:19:45 +01:00
soc	fsp_baytrail: update for UPD_SPD_CHECK macro	2014-12-05 16:21:06 +01:00
southbridge	southbridge/amd/agesa/hudson/Kconfig: Fix space/tab usage	2014-12-04 01:31:55 +01:00
superio	Mark non-executable files non-executable	2014-12-01 17:33:07 +01:00
vendorcode	vendorcode/amd/agesa/f15tn: Trim out ASCII art in GnbIommuScratch.c	2014-12-05 07:46:25 +01:00
Kconfig	Add UCB RISCV support for architecture, soc, and emulation mainboard..	2014-12-01 19:06:43 +01:00