Patrick Rudolph 8d7a89b271 soc/intel/common/block/p2sb/p2sb: Add missing PCI IDs ... The code is compiled on SKL/KBL, but the P2SB PCI IDs were missing. Add them to make sure that the BAR0 doesn't change when running PCI resource allocation. Change-Id: I7cffbbc7d15dad14cccd122a081099b51dc1ce07 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35791 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2019-10-05 13:48:15 +00:00
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apollolake	soc/intel: Replace config_of_path() with config_of_soc()	2019-10-02 11:21:10 +00:00
baytrail	intel/pci_devs: Regroup PCI xx_DEVID entries	2019-10-02 20:13:24 +00:00
braswell	soc/intel/braswell/chip.h: Add IGD_MEMSIZE_xxMB	2019-10-03 14:05:53 +00:00
broadwell	soc/intel: Replace config_of_path() with config_of_soc()	2019-10-02 11:21:10 +00:00
cannonlake	soc/intel: Replace config_of_path() with config_of_soc()	2019-10-02 11:21:10 +00:00
common	soc/intel/common/block/p2sb/p2sb: Add missing PCI IDs	2019-10-05 13:48:15 +00:00
denverton_ns	intel/pci_devs: Regroup PCI xx_DEVID entries	2019-10-02 20:13:24 +00:00
fsp_baytrail	intel/fsp_baytrail: Define PCH_DEV_SLOT_I2C1	2019-10-05 05:07:29 +00:00
fsp_broadwell_de	intel/pci_devs: Regroup PCI xx_DEVID entries	2019-10-02 20:13:24 +00:00
icelake	soc/intel: Replace config_of_path() with config_of_soc()	2019-10-02 11:21:10 +00:00
quark	intel/quark: Drop xx_DEV_FUNC	2019-10-02 20:14:27 +00:00
skylake	soc/skl/vr_config: fix KBL-U GT3 detection bug	2019-10-04 16:23:32 +00:00
Kconfig	cbfstool: Drop update-fit option	2019-06-24 09:45:00 +00:00