Sumeet Pawnikar 8d0a063810 soc/intel/meteorlake: Set TCC to 90°C ... Set tcc_offset value to 20 in chipset for Thermal Control Circuit (TCC) activation feature for meteorlake silicon. Also, remove tcc_offset default value from rex baseboard and variants. BUG=b:270664854 BRANCH=None TEST=Build FW and test on rex board Change-Id: Ieec1b7e0873eef46a56e612ed1d9445019b1f4a9 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76232 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>		2023-07-05 12:54:13 +00:00
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amd	soc/amd/common/block/acpi/ivrs: use IOMMU PCI register definitions	2023-07-04 17:51:26 +00:00
cavium	soc/cavium/cn81xx: Use correct size for MPIDR_EL1 register	2023-05-13 17:22:16 +00:00
example/min86	soc: Add SPDX license headers to Makefiles	2022-10-31 03:27:13 +00:00
intel	soc/intel/meteorlake: Set TCC to 90°C	2023-07-05 12:54:13 +00:00
mediatek	soc/mediatek: Enable DRAM scramble on fast calibration flow	2023-06-26 02:23:21 +00:00
nvidia	treewide: stop calling custom TPM log "TCPA"	2023-01-11 16:00:55 +00:00
qualcomm	treewide: Remove 'extern' from functions declaration	2023-05-26 13:45:24 +00:00
rockchip	cbmem_top_chipset: Change the return value to uintptr_t	2022-11-18 16:00:45 +00:00
samsung	treewide: Fix old-style declarations	2023-01-17 04:23:49 +00:00
sifive/fu540	soc/sifive: Comment out set but unused variables	2023-06-04 19:22:50 +00:00
ti	src/soc/ti: Remove unnecessary space after casts	2022-11-22 13:42:28 +00:00
ucb/riscv	cbmem_top_chipset: Change the return value to uintptr_t	2022-11-18 16:00:45 +00:00