coreboot/src/mainboard/google/chell
Aaron Durbin d13c2fe89b UPSTREAM: vboot: consolidate google_chromeec_early_init() calls
On x86 platforms, google_chromeec_early_init() is used to put the EC
into RO mode when there's a recovery request. This is to avoid training
memory multiple times when the recovery request is through an EC host
event while the EC is running RW code. Under that condition the EC will
be reset (along with the rest of the system) when the kernel verification
happens. This leads to an execessively long recovery path because of the
double reboot performing full memory training each time.

By putting this logic into the verstage program this reduces the
bootblock size on the skylake boards. Additionally, this provides the
the correct logic for all future boards since it's not tied to FSP
nor the mainboard itself. Lastly, this double memory training protection
works only for platforms which verify starting from bootblock. The
platforms which don't start verifying until after romstage need to
have their own calls (such as haswell and baytrail).

BUG=None
BRANCH=None
TEST=None

Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/16318
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>

Change-Id: Ia8385dfc136b09fb20bd3519f3cc621e540b11a5
Reviewed-on: https://chromium-review.googlesource.com/376858
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-08-28 03:15:02 -07:00
..
acpi UPSTREAM: chromeos mainboards: remove chromeos.asl 2016-08-04 23:36:40 -07:00
spd UPSTREAM: src/mainboard: Capitalize ROM, RAM, CPU and APIC 2016-08-15 18:36:04 -07:00
acpi_tables.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
board_info.txt google/intel mainboards: Add missing board_info.txt files 2016-03-25 20:52:04 +01:00
boardid.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
bootblock_mainboard.c UPSTREAM: vboot: consolidate google_chromeec_early_init() calls 2016-08-28 03:15:02 -07:00
chromeos.c UPSTREAM: chromeos mainboards: remove chromeos.asl 2016-08-04 23:36:40 -07:00
chromeos.fmd chromeos.fmd: Mark RW_LEGACY as CBFS 2016-04-05 13:37:31 +02:00
cmos.layout UPSTREAM: mainboard: Clean up boot_option/reboot_bits in cmos.layout 2016-08-17 12:49:03 -07:00
devicetree.cb UPSTREAM: skylake/devicetree: Add PIRQ Routing programming 2016-08-12 22:44:45 -07:00
dsdt.asl UPSTREAM: chromeos mainboards: remove chromeos.asl 2016-08-04 23:36:40 -07:00
ec.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
ec.h ec/google/chromeec/acpi: Add MKBP support 2016-05-20 18:31:18 +00:00
fadt.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
gpio.h UPSTREAM: skylake: gpio: Add support for setting 1.8V tolerant 2016-06-10 00:17:48 -07:00
Kconfig UPSTREAM: Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS 2016-08-19 14:20:03 -07:00
Kconfig.name
mainboard.c UPSTREAM: chromeos mainboards: remove chromeos.asl 2016-08-04 23:36:40 -07:00
Makefile.inc UPSTREAM: skylake/mainboard: Define mainboard hook in bootblock 2016-08-02 14:28:58 -07:00
pei_data.c google/chell: Modify DqsMap 2016-01-19 16:39:02 +01:00
ramstage.c tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
romstage.c UPSTREAM: mainboards: align on using ACPI_Sx definitions 2016-07-15 08:39:45 -07:00
smihandler.c UPSTREAM: mainboards/skylake: use common Chrome EC SMI helpers 2016-07-15 16:50:33 -07:00