Lean Sheng Tan 8bbff1f554 soc/intel/elkhartlake: Make use of FSP_ARRAY_LOAD macro ... Use FSP_ARRAY_LOAD macro for checking and loading array type configs into array type UPDs to increase readability. Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: I2562977e55f8909038697f7e19b82ec6b5e47fae Reviewed-on: https://review.coreboot.org/c/coreboot/+/55553 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>		2021-06-18 06:03:25 +00:00
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alderlake	soc/intel/{alderlake,tigerlake}: Fix typo in pmc.h	2021-06-17 15:59:29 +00:00
apollolake	soc/intel/apollolake: Make use of is_devfn_enabled() function	2021-06-16 03:47:46 +00:00
baytrail	ACPI: Refactor use of global and device NVS	2021-06-14 19:45:56 +00:00
braswell	ACPI: Refactor use of global and device NVS	2021-06-14 19:45:56 +00:00
broadwell	arch/x86/ioapic: Drop irq_on_fsb as a configurable item	2021-06-16 19:54:49 +00:00
cannonlake	soc/intel/cannonlake: Make use of is_devfn_enabled() function	2021-06-16 03:48:29 +00:00
common	soc/intel/car/cache_as_ram.S: Fix typo in comment	2021-06-18 04:40:38 +00:00
denverton_ns	arch/x86/ioapic: Drop irq_on_fsb as a configurable item	2021-06-16 19:54:49 +00:00
elkhartlake	soc/intel/elkhartlake: Make use of FSP_ARRAY_LOAD macro	2021-06-18 06:03:25 +00:00
icelake	cpu/x86: Default to PARALLEL_MP selected	2021-06-07 21:02:54 +00:00
jasperlake	soc/intel/jasperlake: Make use of is_devfn_enabled() function	2021-06-16 03:48:43 +00:00
quark	mainboards: Drop PWRS from GNVS	2021-02-11 16:35:32 +00:00
skylake	cpu/x86: Default to PARALLEL_MP selected	2021-06-07 21:02:54 +00:00
tigerlake	soc/intel/{alderlake,tigerlake}: Fix typo in pmc.h	2021-06-17 15:59:29 +00:00
xeon_sp	soc/intel/xeon_sp/cpx: Move MSR Locks to CPU init and fix them	2021-06-16 04:18:36 +00:00
Kconfig