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coreboot/src/cpu/x86
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Duncan Laurie 8bb772379f Add Kconfig options to enable TSEG and set a size 
Future CPUs will require TSEG use for SMM

Change-Id: I1432569ece4371d6e12c997e90d66c175fa54c5c
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: http://review.coreboot.org/766
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-03-30 17:47:22 +02:00
..
16bit Fix address of IDT in real-mode entry 2012-03-16 19:34:14 +01:00
32bit Remove whitespace. 2012-02-17 19:04:31 +01:00
cache post code: Replaced hard-coded post code with macro 2012-01-23 22:50:56 +01:00
lapic drop use of MAX_PHYSICAL_CPUS and MAX_CPUS where not needed 2012-03-30 17:46:09 +02:00
mtrr Add an option to keep the ROM cached after romstage 2012-03-30 01:07:49 +02:00
name Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
pae drop use of MAX_PHYSICAL_CPUS and MAX_CPUS where not needed 2012-03-30 17:46:09 +02:00
smm move console includes to central console/console.h 2012-03-09 20:31:45 +01:00
tsc Rename build system variables to be more intuitive, and 2010-09-30 16:55:02 +00:00
fpu_enable.inc Add a few missing license headers based on svn logs, and also add a 2010-09-27 17:53:17 +00:00
Kconfig Add Kconfig options to enable TSEG and set a size 2012-03-30 17:47:22 +02:00
sse_enable.inc Add a few missing license headers based on svn logs, and also add a 2010-09-27 17:53:17 +00:00