Zheng Bao 8b54c0e04b soc/amd/cezanne: FSP: Add UPD entry for eDP tuning ... The FSP gets these values from the UPD and sets the internal values. The document about eDP tuning is attached in issue tracker of this ticket, at the issue tracker b/203061533#comment6. BUG=b:203061533 Cq-Depend: chrome-internal:4303901 Change-Id: I9b85faac4f2fa1fb2c14bb85b615346d4379baac Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59918 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Huang <patrick.huang@amd.corp-partner.google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2022-01-25 23:57:06 +00:00
..
amd	soc/amd/cezanne: FSP: Add UPD entry for eDP tuning	2022-01-25 23:57:06 +00:00
cavium	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
example	Rename ECAM-specific MMCONF Kconfigs	2021-11-10 17:24:16 +00:00
intel	soc/intel/ehl: Add Kconfig option to disable reset on TCO expiration	2022-01-25 16:15:30 +00:00
mediatek	soc/mediatek: Save dramc_param header to mrc_cache	2022-01-25 09:42:29 +00:00
nvidia	soc/nvidia,qualcomm: Fix indirect includes	2021-11-09 00:13:25 +00:00
qualcomm	sc7180: Update video mode active horizontal/vertical/total calculations	2022-01-12 17:35:21 +00:00
rockchip	mipi: Make panel init callback work directly on DSI transaction types	2021-09-11 01:42:47 +00:00
samsung	src/soc to src/superio: Fix spelling errors	2021-10-05 18:07:08 +00:00
sifive	src/soc to src/superio: Fix spelling errors	2021-10-05 18:07:08 +00:00
ti
ucb