coreboot/src
WANG Siyuan 8b4f98a41f AMD Bettong: add README
This is the initial version of README.
AMD provides stable Bettong code in github. Add the link and bug fixed
list to README.

Change-Id: Ie8b761096fd1850afb9363ebb761aa4992b47643
Signed-off-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Signed-off-by: WANG Siyuan <SiYuan.Wang@amd.com>
Reviewed-on: http://review.coreboot.org/11737
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2015-11-20 05:42:32 +01:00
..
acpi tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
arch arm64: tegra132: tegra210: Remove old arm64/stage_entry.S 2015-11-17 21:31:20 +01:00
commonlib vendorcode/google/chromeos: Cache VPD data into CBMEM 2015-11-19 21:37:47 +01:00
console x86: Add Kconfig to disable early bootblock postcodes 2015-11-19 00:16:50 +01:00
cpu cpu/amd/fam10h-fam15h: Bring HT register configuration in line with BKDG 2015-11-19 20:22:08 +01:00
device device/device.c: remove warning for missing apic read resources 2015-11-19 14:46:43 +01:00
drivers intel/fsp1_0: Use dummy microcode when calling FSP TempRamInit 2015-11-16 17:42:36 +01:00
ec tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
include rules.h: Add ENV_ macros to detect current architecture 2015-11-17 21:31:07 +01:00
lib vendorcode/google/chromeos: Cache VPD data into CBMEM 2015-11-19 21:37:47 +01:00
mainboard AMD Bettong: add README 2015-11-20 05:42:32 +01:00
northbridge nb/intel/sandybridge/raminit: Factor out code into toggle_io_reset 2015-11-19 21:43:31 +01:00
soc google/veyron*: Pulse the i2c clock once if sda was low 2015-11-18 16:29:16 +01:00
southbridge AMD Bettong: refactor PCI interrupt table 2015-11-20 05:41:41 +01:00
superio Revert "Drop SuperIO nuvoton/nct6779d" 2015-11-16 17:44:54 +01:00
vendorcode vendorcode/google/chromeos: Cache VPD data into CBMEM 2015-11-19 21:37:47 +01:00
Kconfig Remove dependency for HAS_PRECBMEM_TIMESTAMP_REGION 2015-11-18 23:22:11 +01:00