Marc Jones 8ae8c88220 Initial AMD Barcelona support for rev Bx. ... These are the core files for HyperTransport, DDR2 Memory, and multi-core initialization. Signed-off-by: Marc Jones <marc.jones@amd.com> Reviewed-by: Jordan Crouse <jordan.crouse@amd.com> Acked-by: Myles Watson <myles@pel.cs.byu.edu> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3014 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2007-12-19 01:32:08 +00:00
..
arch	This patch adds support for MCFG table, which allows OS to find the	2007-11-03 12:50:26 +00:00
boot	fix a whole bunch of warnings. (trivial)	2007-10-23 22:17:45 +00:00
config	Initial AMD Barcelona support for rev Bx.	2007-12-19 01:32:08 +00:00
console	Another CONSTification...	2007-10-24 14:42:12 +00:00
cpu	Initial AMD Barcelona support for rev Bx.	2007-12-19 01:32:08 +00:00
devices	fix a whole bunch of warnings. (trivial)	2007-10-23 22:17:45 +00:00
drivers	Ever wondered where those "setting incorrect section attributes for	2007-10-24 09:08:58 +00:00
include	Initial AMD Barcelona support for rev Bx.	2007-12-19 01:32:08 +00:00
lib	This is (most of) the usb2 debug console code ripped out of	2007-02-28 11:17:02 +00:00
mainboard	Enable IDE legacy port access for all 440BX based boards per default, as	2007-12-17 21:34:53 +00:00
northbridge	Initial AMD Barcelona support for rev Bx.	2007-12-19 01:32:08 +00:00
pc80	Add a debug message to keyboard init. This helped isolate at least one	2007-10-17 22:34:40 +00:00
pmc/altimus/mpc7410	Use the common LinuxBIOS license header (trivial). Refs #5.	2006-12-05 15:27:46 +00:00
ram	Trivial: remove unused variable.	2007-10-22 17:04:39 +00:00
sdram	1201_ht_bus0_dev0_fidvid_core.diff	2005-12-02 21:52:30 +00:00
southbridge	Improve support for the Intel 82371FB/SB/AB/EB/MB southbridge(s):	2007-11-30 02:08:26 +00:00
stream	This eliminates an illegal and annoying warning.	2007-02-03 10:43:48 +00:00
superio	Fix the remaining issues with GA-M57SLI Super I/O GPIO configuration.	2007-11-12 11:14:10 +00:00