coreboot/src/cpu
Carl-Daniel Hailfinger 92f3eda809 Thanks to Jason Zhao we got a skeleton CAR code for VIA C7. I have tried
to clean it up a bit and find justifications for every difference from
x86 and AMD CAR code. I believe this is mostly merge-ready. Although I'd
have preferred to do this for v3 first, we can fix v2 boards with this
change and then move them to v3.
Thanks to Bari Ari for getting the code to me for rewrite/review.

CONFIG_CARTEST shall not be enabled (breaks the build).

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Jason Zhao <jasonzhao@viatech.com.cn>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3634 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-10-03 15:17:47 +00:00
..
amd The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of 2008-10-01 12:52:52 +00:00
emulation/qemu-x86 The ARRAY_SIZE macro is convenient, yet mostly unused. Switch lots of 2008-10-01 12:52:52 +00:00
intel This patch implements support for the CPU core of the Intel EP80579 2008-08-25 14:41:11 +00:00
ppc Rename almost all occurences of LinuxBIOS to coreboot. 2008-01-18 15:08:58 +00:00
simple_init - First stab at getting the ppc ports building and working. 2004-11-18 22:38:08 +00:00
via Thanks to Jason Zhao we got a skeleton CAR code for VIA C7. I have tried 2008-10-03 15:17:47 +00:00
x86 adapt Uncompressing.. patch for AMD code. Also replace "linxbios" by "coreboot" 2008-08-02 19:17:42 +00:00