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Lee Leahy 87df8d08d6 soc/intel/quark: Enable Serial Port 
Add the code to enable debug serial output using HSUART1:

*  Enable the code using Kconfig value ENABLE_BUILTIN_HSUART1
*  Note that the BIST value is always zero as validated in
   esram_init.inc
*  The initial TSC value is currently not saved!

Testing on Galileo:
*  Edit the src/mainboard/intel/galileo/Makefile.inc file
   *  Add "select ADD_FSP_PDAT_FILE"
   *  Add "select ADD_FSP_RAW_BIN"
   *  Add "select ADD_RMU_FILE"
*  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
*  Place the pdat.bin files in the location specified by
   CONFIG_FSP_PDAT_FILE
*  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
*  Testing is successful if serial output is present on HSUART1 at
   115200 baud, 8-bit, no parity

Change-Id: I7e6181e8b9bc901c3ab236f0b56534850bb6bfd0
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13445
Tested-by: build bot (Jenkins)
Reviewed-by: FEI WANG <wangfei.jimei@gmail.com>
2016-02-09 16:20:38 +01:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch xcompile: Add a way to specify -march=i586 2016-02-03 02:58:10 +01:00
commonlib commonlib: move uefi includes out of commonlib includes 2016-02-02 14:27:03 +01:00
console console: Simplify bootblock console Kconfig selection logic 2016-01-21 05:37:27 +01:00
cpu cpu/amd/fam10h-fam15h: Honor CMOS option to disable CPB (core boost) 2016-02-05 22:27:31 +01:00
device arch/x86: Drop arch/pciconf.h 2016-01-26 20:22:44 +01:00
drivers drivers/intel/fsp1_1: Make fsp_run_silicon_init public 2016-02-08 18:53:45 +01:00
ec google/chromeec: implement vboot_(save|retrieve)_hash API 2016-02-04 17:34:58 +01:00
include nhlt: add api to override oem_id and oem_table_id of acpi_header_t 2016-02-09 13:21:39 +01:00
lib nhlt: add api to override oem_id and oem_table_id of acpi_header_t 2016-02-09 13:21:39 +01:00
mainboard google/lars: Set I2C[4] port voltage to 1.8v 2016-02-09 14:07:21 +01:00
northbridge nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h 2016-02-05 22:26:54 +01:00
soc soc/intel/quark: Enable Serial Port 2016-02-09 16:20:38 +01:00
southbridge drivers/pc80: Add PS/2 mouse presence detect 2016-02-01 22:10:46 +01:00
superio drivers/pc80: Add PS/2 mouse presence detect 2016-02-01 22:10:46 +01:00
vendorcode chromeos: Add option to back up VBNV CMOS into flash 2016-02-09 14:03:12 +01:00
Kconfig chromeos/vboot: provide support for x86 memory init verification 2016-02-04 17:34:00 +01:00