82163aedc6
Currently .bss and .data are within the PT_LOAD area of the bootblock.elf and thus are placed and initialized at the correct spot when PSP loads the BIOS Reset Image into DRAM. On S3 resume PSP verifies that the "BIOS Reset Image" is unmodified before it hands over control to such. Due to the use of BSS and DATA within the BIOS Reset Image and the modifications of such at previous boot the verification always fails. This change moves '.bss' and '.data' out of the *first* PT_LOAD area and moves it into a separate data_segment also marked PT_LOAD. Since the second PT_LOAD is ignored by AMDCOMPRESS it doesn't end in the area being verified at S3 resume. Since '.data' is now part of a separate PT_LOAD a new region is inserted called '.datacopy' which is filled by using objcopy. In turn the assembly code in bootblock will memcpy '.datacopy' to '.data'. TEST: Can still boot on amd/birman+ and on up/squared. Change-Id: Id159ade3029060ce2ca6abcb723d5bdfe8841c3a Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87305 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
364 lines
9.2 KiB
C
364 lines
9.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef _RULES_H
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#define _RULES_H
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#if defined(__TEST__)
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#define ENV_TEST 1
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#else
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#define ENV_TEST 0
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#endif
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#if defined(__TIMELESS__)
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#define ENV_TIMELESS 1
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#else
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#define ENV_TIMELESS 0
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#endif
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/* Useful helpers to tell whether the code is executing in bootblock,
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* romstage, ramstage or SMM.
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*/
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#if defined(__DECOMPRESSOR__)
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#define ENV_DECOMPRESSOR 1
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "decompressor"
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#elif defined(__BOOTBLOCK__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 1
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "bootblock"
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#elif defined(__ROMSTAGE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 1
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "romstage"
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#elif defined(__SMM__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 1
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "smm"
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/*
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* NOTE: "verstage" code may either run as a separate stage or linked into the
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* bootblock/romstage, depending on the setting of the VBOOT_SEPARATE_VERSTAGE
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* kconfig option. The ENV_SEPARATE_VERSTAGE macro will only return true for
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* "verstage" code when CONFIG(VBOOT_SEPARATE_VERSTAGE) is true, otherwise that
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* code will have ENV_BOOTBLOCK or ENV_SEPARATE_ROMSTAGE set (depending on the
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* "VBOOT_STARTS_IN_"... kconfig options).
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*/
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#elif defined(__VERSTAGE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 1
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
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#define ENV_STRING "verstage-before-bootblock"
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#else
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#define ENV_STRING "verstage"
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#endif
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#elif defined(__RAMSTAGE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 1
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "ramstage"
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#elif defined(__RMODULE__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 1
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "rmodule"
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#elif defined(__POSTCAR__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 1
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#define ENV_LIBAGESA 0
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#define ENV_STRING "postcar"
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#elif defined(__LIBAGESA__)
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 1
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#define ENV_STRING "libagesa"
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#else
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/*
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* Default case of nothing set for random blob generation using
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* create_class_compiler that isn't bound to a stage.
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*/
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#define ENV_DECOMPRESSOR 0
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#define ENV_BOOTBLOCK 0
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#define ENV_SEPARATE_ROMSTAGE 0
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#define ENV_RAMSTAGE 0
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#define ENV_SMM 0
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#define ENV_SEPARATE_VERSTAGE 0
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#define ENV_RMODULE 0
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#define ENV_POSTCAR 0
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#define ENV_LIBAGESA 0
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#define ENV_STRING "UNKNOWN"
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#endif
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/* Define helpers about the current architecture, based on toolchain.mk. */
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#if defined(__ARCH_arm__)
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#define ENV_ARM 1
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#define ENV_ARM64 0
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#if __COREBOOT_ARM_ARCH__ == 4
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#define ENV_ARMV4 1
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#define ENV_ARMV7 0
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#define ENV_ARCH "armv4"
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#elif __COREBOOT_ARM_ARCH__ == 7
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#define ENV_ARMV4 0
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#define ENV_ARMV7 1
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#define ENV_ARCH "armv7"
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#if defined(__COREBOOT_ARM_V7_A__)
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#define ENV_ARMV7_A 1
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#define ENV_ARMV7_M 0
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#define ENV_ARMV7_R 0
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#elif defined(__COREBOOT_ARM_V7_M__)
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#define ENV_ARMV7_A 0
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#define ENV_ARMV7_M 1
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#define ENV_ARMV7_R 0
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#elif defined(__COREBOOT_ARM_V7_R__)
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#define ENV_ARMV7_A 0
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#define ENV_ARMV7_M 0
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#define ENV_ARMV7_R 1
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#endif
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#else
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#endif
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#define ENV_ARMV8 0
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#define ENV_RISCV 0
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#elif defined(__ARCH_arm64__)
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#define ENV_ARM 0
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#define ENV_ARM64 1
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#if __COREBOOT_ARM_ARCH__ == 8
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#define ENV_ARMV8 1
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#else
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#define ENV_ARMV8 0
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#endif
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#define ENV_RISCV 0
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#define ENV_ARCH "aarch64"
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#elif defined(__ARCH_riscv__)
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_RISCV 1
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#define ENV_ARCH "riscv"
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#elif defined(__ARCH_x86_32__)
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_RISCV 0
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#define ENV_X86 1
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#define ENV_X86_32 1
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#define ENV_X86_64 0
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#define ENV_ARCH "x86_32"
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#elif defined(__ARCH_x86_64__)
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_RISCV 0
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#define ENV_X86 1
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#define ENV_X86_32 0
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#define ENV_X86_64 1
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#define ENV_ARCH "x86_64"
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#else
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#define ENV_ARM 0
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#define ENV_ARM64 0
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#define ENV_ARMV4 0
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#define ENV_ARMV7 0
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#define ENV_ARMV8 0
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#define ENV_RISCV 0
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#define ENV_X86 0
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#define ENV_X86_32 0
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#define ENV_X86_64 0
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#define ENV_ARCH "unknown"
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#endif
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#if CONFIG(RAMPAYLOAD)
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/* ENV_PAYLOAD_LOADER is set to ENV_POSTCAR when CONFIG_RAMPAYLOAD is enabled */
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#define ENV_PAYLOAD_LOADER ENV_POSTCAR
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#else
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/* ENV_PAYLOAD_LOADER is set when you are in a stage that loads the payload.
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* For now, that is the ramstage. */
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#define ENV_PAYLOAD_LOADER ENV_RAMSTAGE
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#endif
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#define ENV_ROMSTAGE_OR_BEFORE \
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(ENV_DECOMPRESSOR || ENV_BOOTBLOCK || ENV_SEPARATE_ROMSTAGE || \
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(ENV_SEPARATE_VERSTAGE && !CONFIG(VBOOT_STARTS_IN_ROMSTAGE)))
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#if ENV_X86
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/* Indicates memory layout is determined with arch/x86/car.ld. */
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#define ENV_CACHE_AS_RAM (ENV_ROMSTAGE_OR_BEFORE && !CONFIG(RESET_VECTOR_IN_RAM))
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/*
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* ENV_SEPARATE_DATA_AND_BSS:
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* When not set .data and .bss are in the same PT_LOAD segment defined
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* in program.ld. When set .data and .bss are in a different PT_LOAD segment,
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* defined outside of program.ld.
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*
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*
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* On Intel APL the bootblock is loaded into a 4KiB SRAM.
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* There's no space for .data and .bss.
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* Once the bootblock code has set up CAR it will use it for .data and .bss.
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* The other stages are load into CAR and doesn't need separation.
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*
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*
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* On Non CAR AMD platforms the bootblock is loaded into DRAM on cold boot.
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* On S3 the loader verifies that the bootblock has the same hash as on cold boot.
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* As it must not change .data and .bss are not part of the PT_LOAD segment and
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* the assembly code must set up .bss and load .data.
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*
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*
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* On other platforms that use Cache As RAM:
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* By default CAR implies separate .data and .bss.
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* The stages execute from memory mapped SPI flash and use CAR as heap.
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*/
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#define ENV_SEPARATE_DATA_AND_BSS (ENV_BOOTBLOCK || (ENV_CACHE_AS_RAM && !CONFIG(NO_XIP_EARLY_STAGES)))
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#else /* !ENV_X86 */
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#define ENV_CACHE_AS_RAM 0
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#define ENV_SEPARATE_DATA_AND_BSS 0
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#endif
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/* Currently ramstage has heap. */
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#define ENV_HAS_HEAP_SECTION ENV_RAMSTAGE
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/* Set USER_SPACE in the makefile for the rare code that runs in userspace */
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#if defined(__USER_SPACE__)
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#define ENV_USER_SPACE 1
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#else
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#define ENV_USER_SPACE 0
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#endif
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/* Define the first stage to run */
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#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)
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#define ENV_INITIAL_STAGE ENV_SEPARATE_VERSTAGE
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#else
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#define ENV_INITIAL_STAGE ENV_BOOTBLOCK
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#endif
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#define ENV_CREATES_CBMEM (ENV_SEPARATE_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)))
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#define ENV_HAS_CBMEM (ENV_CREATES_CBMEM || ENV_POSTCAR || ENV_RAMSTAGE)
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#define ENV_RAMINIT (ENV_SEPARATE_ROMSTAGE || (ENV_BOOTBLOCK && !CONFIG(SEPARATE_ROMSTAGE)))
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#if ENV_X86
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#define ENV_HAS_SPINLOCKS !ENV_ROMSTAGE_OR_BEFORE
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#elif ENV_RISCV
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#define ENV_HAS_SPINLOCKS 1
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#else
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#define ENV_HAS_SPINLOCKS 0
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#endif
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/* When set <arch/smp/spinlock.h> is included for the spinlock implementation. */
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#define ENV_SUPPORTS_SMP (CONFIG(SMP) && ENV_HAS_SPINLOCKS)
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#if ENV_X86 && CONFIG(COOP_MULTITASKING) && (ENV_RAMSTAGE || ENV_CREATES_CBMEM)
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/* TODO: Enable in all x86 stages */
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#define ENV_SUPPORTS_COOP 1
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#else
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#define ENV_SUPPORTS_COOP 0
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#endif
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/**
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* For pre-DRAM stages and post-CAR always build with simple device model, ie.
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* PCI, PNP and CPU functions operate without use of devicetree. The reason
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* post-CAR utilizes __SIMPLE_DEVICE__ is for simplicity. Currently there's
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* no known requirement that devicetree would be needed during that stage.
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*
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* For ramstage individual source file may define __SIMPLE_DEVICE__
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* before including any header files to force that particular source
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* be built with simple device model.
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*/
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#if !ENV_RAMSTAGE
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#define __SIMPLE_DEVICE__
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#endif
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#endif /* _RULES_H */
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