coreboot/src/arch
Jonathan Neuschäfer b45559fdd1 UPSTREAM: riscv: Move mcall numbers to mcall.h, adjust their names
The new name and location make more sense:

 - The instruction used to call into machine mode isn't called "ecall"
   anymore; it's mcall now.
 - Having SBI_ in the name is slightly wrong, too: these numbers are not
   part of the Supervisor Binary Interface, they are just used to
   forward SBI calls (they could be renumbered arbitrarily without
   breaking an OS that's run under coreboot).

Also remove mcall_dev_{req,resp} and the corresponding mcall numbers,
which are no longer used.

BUG=none
BRANCH=none
TEST=none

Change-Id: I71a96971f46d515a66d5f77497b40d891c1b5fca
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: c5ebb1d005
Original-Change-Id: I76a8cb04e4ace51964b1cb4f67d49cfee9850da7
Original-Signed-off-by: Jonathan Neuschfer <j.neuschaefer@gmx.net>
Original-Reviewed-on: https://review.coreboot.org/18146
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://chromium-review.googlesource.com/430174
Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
2017-01-19 06:10:57 -08:00
..
arm UPSTREAM: buildsystem: Drop explicit (k)config.h includes 2016-12-09 03:29:54 -08:00
arm64 UPSTREAM: buildsystem: Drop explicit (k)config.h includes 2016-12-09 03:29:54 -08:00
mips build system: remove CBFSTOOL_PRE1_OPTS 2016-05-03 11:40:49 +02:00
power8 UPSTREAM: region: Add writeat and eraseat support 2016-06-27 17:13:18 -07:00
riscv UPSTREAM: riscv: Move mcall numbers to mcall.h, adjust their names 2017-01-19 06:10:57 -08:00
x86 UPSTREAM: arch/x86: fix cmos post logging in non romcc bootblock 2017-01-09 23:46:44 -08:00