coreboot/src/cpu
Duncan Laurie 86bd4f640e smi: Update mainboard_smi_gpi() to have 32bit argument
With the LynxPoint chipset there are more than 16
possible GPIOs that can trigger an SMI so we need
a mainboard handler that can support this.

There are only a handful of users of this function
so just change them all to use the new prototype.

BUG=chrome-os-partner:16862
BRANCH=none
TEST=manual: build and boot on wtm2

Change-Id: I3d96da0397d6584f713fcf6003054b25c1c92939
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49530
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2013-04-30 13:47:43 -07:00
..
amd AMD: Drop six copies of wrmsr_amd and rdmsr_amd 2013-04-04 04:52:18 +02:00
armltd ARMV7: minor tweaks to inter-stage calling and payload handling. 2013-02-20 20:49:16 +01:00
intel haswell: Configure PCH power sharing for ULT 2013-04-29 13:13:02 -07:00
samsung exynos5250: uncomment $(INTERMEDIATE) 2013-04-26 07:42:28 -07:00
via GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
x86 smi: Update mainboard_smi_gpi() to have 32bit argument 2013-04-30 13:47:43 -07:00
Kconfig Minor Kconfig help text fix 2013-04-01 23:27:07 +02:00
Makefile.inc Fix microcode selection code 2013-02-27 21:01:53 +01:00