coreboot/src/soc
Lee Leahy c0a6c5196a UPSTREAM: soc/intel/quark: Add EHCI errata
Move the EHCI errata from QuarkFSP into coreboot.

TEST=Build and run on Galileo Gen2

BUG=None
BRANCH=None
TEST=None

Change-Id: I424ffd81643fbba9c820b5a8a6809b9412965f8d
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/14940
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347163
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2016-05-26 03:21:52 -07:00
..
broadcom/cygnus soc/*: fix uart's regwidth specification in cbtables 2016-02-21 12:26:05 +01:00
dmp/vortex86ex dmp/vortex86ex: Merge northbridge and southbridge into soc 2016-05-05 20:06:33 +02:00
imgtec/pistachio drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
intel UPSTREAM: soc/intel/quark: Add EHCI errata 2016-05-26 03:21:52 -07:00
marvell drivers/uart: Use uart_platform_refclk for all UART models 2016-05-09 18:45:44 +02:00
mediatek/mt8173 soc/mediatek/mt8173: mt6391: vcore sleep voltage should be 0.7V 2016-05-09 08:36:57 +02:00
nvidia nvidia/tegra124: Adjust memlayout to Chrome OS toolchain 2016-05-20 21:59:35 +00:00
qualcomm Gale board: Moving TPM setup function to verstage.c 2016-05-12 15:45:03 -06:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip gru: kevin: configure board GPIOs 2016-05-24 15:46:00 -07:00
samsung soc/samsung: Don't compile in unused uart divider tables 2016-05-11 21:21:41 +02:00
ucb/riscv tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00