In all SoC lpc_early_init gets called either after a call to enable_acpimmio_decode_pm04() or the ACPIMMIO mapping is already enabled after reset on the SoC. This allows to use pm_read8 and pm_write8 that use the ACPIMMIO mapping of the PM registers to set the PM_LPC_ENABLE bit in the PM_LPC_GATING register instead of pm_io_read8 and pm_io_write8 which won't work on Phoenix and Glinda due to the IO ports used on older generations to access to the PM registers not being implemented any more. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8b31ec4e03a06796502c89e3c2cfaac2d41b0ed9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/76461 Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| commonlib | ||
| console | ||
| cpu | ||
| device | ||
| drivers | ||
| ec | ||
| include | ||
| lib | ||
| mainboard | ||
| northbridge | ||
| sbom | ||
| security | ||
| soc | ||
| southbridge | ||
| superio | ||
| vendorcode | ||
| Kconfig | ||