coreboot/src
Jeremy Compostella 84c3b5e051 drivers/pc80/vga: Add legacy VGA romstage support
This is support for adding legacy VGA support into romstage.
Support for this is being provided by libgfxinit.

The current use case allows us to initialize the display
before memory init (prior to physical memory init) to inform
the user when lengthy memory training is needed.

BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=VGA code compiles for romstage

Change-Id: I81309871e8db71657b2a9816708141f121d767d3
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70278
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-01-07 17:46:54 +00:00
..
acpi
arch
commonlib vc/google: Add and use POST_CODE_CLEAR definition 2023-01-07 03:31:41 +00:00
console
cpu
device spd.h: Move enum ddr3_module_type to ddr3.h 2023-01-04 12:39:32 +00:00
drivers drivers/pc80/vga: Add legacy VGA romstage support 2023-01-07 17:46:54 +00:00
ec
include spd.h: Move enum ddr3_module_type to ddr3.h 2023-01-04 12:39:32 +00:00
lib
mainboard mb/google/rex: Disable stage cache 2023-01-07 16:20:32 +00:00
northbridge nb/intel/haswell: Specify supported memory type 2023-01-05 05:32:47 +00:00
sbom
security security/intel/stm/StmPlatformResource.c: Fix typo on "threads" 2022-12-31 09:30:54 +00:00
soc soc/intel/: Rename small and big cores references 2023-01-06 21:34:54 +00:00
southbridge
superio
vendorcode vc/google: Add and use POST_CODE_CLEAR definition 2023-01-07 03:31:41 +00:00
Kconfig Kconfig: Allow mainboards to disable stage cache 2023-01-06 10:39:35 +00:00