903db9911e
This is a stopgap for when you use SUPERIO_SMSC_SMSCSUPERIO and the interrupt is unmapped at reset, but for whatever reason the chip is inaccessible in smscsuperio/superio.c::enable_dev() and thus the devicetree.cb IRQ information is not applied in ramstage and then serial console output fails to work for more than the UART FIFO depth in the OS. BUG=None BRANCH=None TEST=None Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-on: https://review.coreboot.org/10807 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Change-Id: I00998088975569516f7caeb7f4098b48fe437889 Reviewed-on: https://chromium-review.googlesource.com/414558 Commit-Ready: Aaron Durbin <adurbin@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> |
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| acpi | ||
| common | ||
| fintek | ||
| intel | ||
| ite | ||
| nsc | ||
| nuvoton | ||
| renesas | ||
| serverengines | ||
| smsc | ||
| via | ||
| winbond | ||
| Makefile.inc | ||