8406fb4e27
Starting with version 18 LLVM puts code and data generated with -ffunction-section -mcmodel=large inside sections with an 'l' prefix. Change-Id: Ib755673dfa9e71172bbef0a5aec075154c89a97b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81675 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de> Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
184 lines
4.1 KiB
Text
184 lines
4.1 KiB
Text
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <memlayout.h>
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/* This file is included inside a SECTIONS block */
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/* First we place the code and read only data (typically const declared).
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* This could theoretically be placed in rom.
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* The '.' in '.text . : {' is actually significant to prevent missing some
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* SoC's entry points due to artificial alignment restrictions, see
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* https://sourceware.org/binutils/docs/ld/Output-Section-Address.html
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*/
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/* Starting with version 18 LLVM the combination -ffunction-section -mcmodel=large
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* puts code and data in '.ltext, '.lrodata', '.ldata' and '.lbss'
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*/
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.text . : {
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_program = .;
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_text = .;
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#if !(ENV_X86 && ENV_BOOTBLOCK)
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*(.init._start);
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*(.init);
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*(.init.*);
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#endif
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*(.text._start);
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*(.text.stage_entry);
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KEEP(*(.metadata_hash_anchor));
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*(.text);
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*(.text.*);
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*(.ltext);
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*(.ltext.*);
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#if ENV_HAS_CBMEM
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_cbmem_init_hooks = .;
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KEEP(*(.rodata.cbmem_init_hooks_early));
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KEEP(*(.rodata.cbmem_init_hooks));
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_ecbmem_init_hooks = .;
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RECORD_SIZE(cbmem_init_hooks)
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_rsbe_init_begin = .;
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KEEP(*(.rsbe_init));
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_ersbe_init_begin = .;
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RECORD_SIZE(rsbe_init_begin)
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#if ENV_RAMSTAGE
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_pci_drivers = .;
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KEEP(*(.rodata.pci_driver));
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_epci_drivers = .;
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RECORD_SIZE(pci_drivers)
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_cpu_drivers = .;
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KEEP(*(.rodata.cpu_driver));
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_ecpu_drivers = .;
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RECORD_SIZE(cpu_drivers)
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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*(.rodata);
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*(.rodata.*);
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*(.lrodata);
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*(.lrodata.*);
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_etext = .;
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RECORD_SIZE(text)
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} : to_load
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#if ENV_RAMSTAGE && (CONFIG(COVERAGE) || CONFIG(ASAN_IN_RAMSTAGE))
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.ctors . : {
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. = ALIGN(0x100);
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__CTOR_LIST__ = .;
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KEEP(*(.ctors));
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LONG(0);
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LONG(0);
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__CTOR_END__ = .;
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} : to_load
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#endif
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/* Include data, bss, and heap in that order. Not defined for all stages. */
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#if !ENV_SEPARATE_DATA_AND_BSS
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.data . : {
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. = ALIGN(ARCH_CACHELINE_ALIGN_SIZE);
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_data = .;
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/*
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* The postcar phase uses a stack value that is located in the relocatable
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* module section. While the postcar stage could be linked like smm and
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* other rmodules the postcar stage needs similar semantics of the more
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* traditional stages in the coreboot infrastructure. Therefore it's easier
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* to specialize this case.
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*/
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#if ENV_RMODULE || ENV_POSTCAR
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_rmodule_params = .;
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KEEP(*(.module_parameters));
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_ermodule_params = .;
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RECORD_SIZE(rmodule_params)
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#endif
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*(.data);
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*(.data.*);
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*(.ldata);
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*(.ldata.*);
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*(.sdata);
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*(.sdata.*);
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#if ENV_ROMSTAGE_OR_BEFORE
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PROVIDE(_preram_cbmem_console = .);
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PROVIDE(_epreram_cbmem_console = _preram_cbmem_console);
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PROVIDE(_preram_cbmem_console_size = ABSOLUTE(0));
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#elif ENV_RAMSTAGE
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_bs_init_begin = .;
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KEEP(*(.bs_init));
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LONG(0);
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LONG(0);
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_ebs_init_begin = .;
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RECORD_SIZE(bs_init_begin)
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#endif
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_edata = .;
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RECORD_SIZE(data)
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} : to_load
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#endif
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#if !ENV_SEPARATE_DATA_AND_BSS
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.bss . (NOLOAD) : {
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_bss = .;
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*(.bss)
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*(.bss.*)
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*(.lbss)
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*(.lbss.*)
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*(.sbss)
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*(.sbss.*)
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_ebss = .;
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RECORD_SIZE(bss)
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} : to_load
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#endif
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#if ENV_HAS_HEAP_SECTION
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.heap . (NOLOAD) : {
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_heap = .;
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. += CONFIG_HEAP_SIZE;
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. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
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_eheap = .;
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RECORD_SIZE(heap)
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} : to_load
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#endif
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#if ENV_RAMSTAGE && CONFIG(ASAN_IN_RAMSTAGE)
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_shadow_size = (_eheap - _data) >> 3;
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REGION(asan_shadow, ., _shadow_size, ARCH_POINTER_ALIGN_SIZE)
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#endif
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_eprogram = .;
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RECORD_SIZE(program)
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/* The stage cache drops CONFIG_HEAP_SIZE bytes from the end of the in-memory
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image of the ramstage, so ensure that when moving that many bytes backwards
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from the program end, we're in the heap (or later), in some region that
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doesn't contain initialized code or data. */
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#if ENV_RAMSTAGE
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_bogus = ASSERT(_eprogram - CONFIG_HEAP_SIZE >= _heap,
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"HEAP_SIZE and heap misaligned");
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#endif
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/* Discard the sections we don't need/want */
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zeroptr = 0;
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/DISCARD/ : {
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*(.comment)
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*(.comment.*)
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*(.note)
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*(.note.*)
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*(.eh_frame);
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}
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