coreboot/src/vendorcode
Lee Leahy 4dfaac71f1 UPSTREAM: soc/intel/quark: Pass in the memory initialization parameters
Specify the memory initialization parameters in
mainboard/intel/galileo/devicetree.cb. Pass these values into FSP to
initialize memory.

TEST=Build and run on Galileo Gen2

BUG=None
BRANCH=None
TEST=None

Change-Id: I83ee196f5fb825118a3a74b61f73f3728a1a1dc6
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/15260
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/359317
Reviewed-by: Furquan Shaikh <furquan@chromium.org>
2016-07-09 01:40:13 -07:00
..
amd UPSTREAM: AGESA boards: Fix split to romstage and ramstage 2016-07-07 01:08:51 -07:00
google tpm2: implement locking firmware rollback counter 2016-07-07 22:14:26 -07:00
intel UPSTREAM: soc/intel/quark: Pass in the memory initialization parameters 2016-07-09 01:40:13 -07:00
siemens UPSTREAM: intel/i210: Change API for function mainboard_get_mac_address() 2016-07-07 01:09:39 -07:00
Makefile.inc vendorcode/siemens: Add hwilib for Siemens specific info struct 2016-04-28 08:15:47 +02:00