Kyösti Mälkki 0a78f91fa3 Intel model_106cx: change CAR to HT-capable ... There are hyper-threading Atom CPUs, those would not enable L2 cache with model_6ex CAR code. Switch to code that can handle different number of threads and cores. Change-Id: I57328c231f8998f45f7b0d26c63b24585f8476dd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/1384 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-by: James Laird <jhl@mafipulation.org> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>		2012-08-27 15:39:29 +02:00
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amd	Auto-declare chip_operations	2012-08-22 05:06:41 +02:00
intel	Intel model_106cx: change CAR to HT-capable	2012-08-27 15:39:29 +02:00
via	Replace cache control magic numbers with symbols	2012-04-25 16:27:07 +02:00
x86	Synchronize rdtsc instructions	2012-08-09 00:38:39 +02:00
Kconfig	Enable Microcode in CBFS for all SandyBridge/IvyBridge systems	2012-07-26 00:19:57 +02:00
Makefile.inc	qemu: drop "northbridge.c" from src/cpu/...	2010-03-29 21:17:25 +00:00