Tim Crawford 198c6291e0 soc/intel/adl: Add power limits for RPL-H 4P+8E 45W ... Change-Id: I01ae5a484287d2adb1516e1e4551b185b895fdde Ref: RPL-UPH and RPL-U Refresh Platform Design Guide (#686872, rev 2.1) Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76097 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>		2023-07-17 03:14:42 +00:00
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alderlake	soc/intel/adl: Add power limits for RPL-H 4P+8E 45W	2023-07-17 03:14:42 +00:00
apollolake	soc/intel/apl: Use newer function for resource declarations	2023-07-12 09:15:08 +00:00
baytrail	soc/intel/baytrail: Use newer function for resource declarations	2023-07-13 14:13:26 +00:00
braswell	soc/intel/braswell: Use newer function for resource declarations	2023-07-13 14:14:21 +00:00
broadwell	soc/intel/broadwell: Use newer function for resource declarations	2023-07-12 09:14:16 +00:00
cannonlake	soc/intel/cannonlake: Hook up ucode for CML-S	2023-07-14 18:49:33 +00:00
common	soc/intel/common: Add support for AP initiated mode entry	2023-07-15 12:48:01 +00:00
denverton_ns	soc/intel/denverton: Use newer function for resource declarations	2023-07-17 02:20:38 +00:00
elkhartlake	soc/intel: Rename pcr.asl to pch_pcr.asl	2023-07-13 16:37:56 +00:00
jasperlake	soc/intel: Rename pcr.asl to pch_pcr.asl	2023-07-13 16:37:56 +00:00
meteorlake	soc/intel: Rename pcr.asl to pch_pcr.asl	2023-07-13 16:37:56 +00:00
skylake	soc/intel: Rename pcr.asl to pch_pcr.asl	2023-07-13 16:37:56 +00:00
tigerlake	soc/intel: Rename pcr.asl to pch_pcr.asl	2023-07-13 16:37:56 +00:00
xeon_sp	soc/intel: Rename pcr.asl to pch_pcr.asl	2023-07-13 16:37:56 +00:00
Makefile.inc