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coreboot/src/soc/intel
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Jeremy Compostella 81d7bc386e soc/intel/cmn/blk/cnvi: Set WFDL default value to 50 ms 
The previous default value of 10 milliseconds is being updated to 50
milliseconds to comply with the latest guidelines (Panther Lake FSP
release 3144.01 CnviWifi.asl file).

TEST=Invoke the following set of acpidbg commands to verify that the
     _RST method still reaches state 2.
     acpidbg -b 'evaluate \_SB.PCI0.CNVW.PRRS' # 0x0
     acpidbg -b 'set N  \_SB.PCI0.CNVW.RSTT 1'
     acpidbg -b 'evaluate \_SB.PCI0.CNVW.CNVP._RST'
     acpidbg -b 'evaluate \_SB.PCI0.CNVW.PRRS' # 0x2

Change-Id: I2b0236c17117d368c1ee98e56c4c1b6525d63e27
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88135
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.corp-partner.google.com>
2025-06-23 16:21:07 +00:00
..
alderlake drivers/intel/fsp2_0: Refactor bitmap loading and GOP BLT conversion 2025-06-23 02:03:59 +00:00
apollolake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
baytrail soc/intel/baytrail: Add microcode for '06-37-08' SOCs 2025-02-03 18:59:45 +00:00
braswell tree: Handle NULL pointer returned by smm_get_save_state() 2025-01-20 03:26:26 +00:00
broadwell soc/intel/broadwell: Add CFR objects for existing options 2025-04-25 14:24:27 +00:00
cannonlake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
common soc/intel/cmn/blk/cnvi: Set WFDL default value to 50 ms 2025-06-23 16:21:07 +00:00
denverton_ns tree: remove duplicated includes 2025-04-20 05:13:57 +00:00
elkhartlake soc/intel/elkhartlake: Hook up S0ix setting to option API 2025-05-08 12:27:06 +00:00
jasperlake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
meteorlake drivers/intel/fsp2_0: Refactor bitmap loading and GOP BLT conversion 2025-06-23 02:03:59 +00:00
pantherlake drivers/intel/fsp2_0: Refactor bitmap loading and GOP BLT conversion 2025-06-23 02:03:59 +00:00
skylake soc/intel/skylake: Add/use enums for IGD config 2025-05-14 18:13:12 +00:00
snowridge soc/intel/common/block: Add const qualifier for input of pirq ops 2024-12-09 13:55:53 +00:00
tigerlake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
xeon_sp soc/intel/xeon_sp: Use Kconfig to define SPI_BASE_ADDRESS 2025-06-13 15:23:42 +00:00
Makefile.mk