erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/src
History
huang lin 817e455d38 add make_idb.py & update bootblock 
BUG=chrome-os-partner:29778
TEST=Build coreboot

Change-Id: Ica7b2bf2cf649c2731933ce59a263692bb2c0282
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: ba9c36daed
Original-Change-Id: Ia0e4e39d4391674f25e630b40913eb99ff3f75c4
Original-Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/209427
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/8862
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-03-24 15:24:52 +01:00
..
arch vboot2: separate verstage from bootblock 2015-03-24 14:48:04 +01:00
console console: Allow bootblock console on MIPS 2015-03-23 15:35:06 +01:00
cpu imgtec/danube: Add support for ImgTec Danube SoC 2015-03-21 16:57:08 +01:00
device PCIe: Revise L1 Sub-State support 2015-03-23 13:11:18 +01:00
drivers vboot2: read secdata and nvdata 2015-03-23 19:51:47 +01:00
ec chromeec: use stopwatch API 2015-03-21 17:00:26 +01:00
include vboot2: factory-initialize kernel space in tpm 2015-03-24 15:19:54 +01:00
lib vboot2: load decompressed stage directly to load address 2015-03-24 15:19:21 +01:00
mainboard add make_idb.py & update bootblock 2015-03-24 15:24:52 +01:00
northbridge cpu/amd/model_10xxx: Add support for early cbmem 2015-03-19 08:28:43 +01:00
soc add make_idb.py & update bootblock 2015-03-24 15:24:52 +01:00
southbridge CBMEM: Add LATE_CBMEM_INIT guards 2015-03-19 06:17:07 +01:00
superio superio: ite8772f: Exit extemp busy state 2015-03-21 08:44:28 +01:00
vendorcode vboot: Add support for OPROM_MATTERS and SLOW_EC 2015-03-24 15:20:30 +01:00
Kconfig Enable publishing of board ID where supported 2015-03-23 17:20:24 +01:00