Sumeet Pawnikar 810527a4ea soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ix ... Enable PCH thermal sensor for dynamic thermal shutdown for S0ix state. BUG=None BRANCH=None TEST=Verified Thermal Device (B0: D18: F0) TSPM offset 0x1c [LTT (8:0)] value is 0xFE. Change-Id: I50796bcf9e0d5a65cd7ba63fedd932967c4c1ff9 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34522 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-07-31 04:27:48 +00:00
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amd	soc/amd/picasso: Remove dead SPD size Kconfig symbol	2019-07-21 17:31:01 +00:00
cavium	arch/non-x86: Flip HAVE_MONOTONIC_TIMER default	2019-07-09 13:07:38 +00:00
imgtec	arch/non-x86: Flip HAVE_MONOTONIC_TIMER default	2019-07-09 13:07:38 +00:00
intel	soc/intel/cannonlake: Enable PCH Thermal Sensor configuration for S0ix	2019-07-31 04:27:48 +00:00
mediatek	soc/mediatek/mt8183: Init SSPM	2019-07-26 12:59:28 +00:00
nvidia	soc/nvidia/tegra124: Assert divisor is non-zero	2019-07-29 06:01:42 +00:00
qualcomm	soc/qualcomm/qcs405: Handle invalid QUP and BLSP	2019-07-29 06:09:17 +00:00
rockchip	soc/{qualcomm,rockchip}: Use 'include <stdlib.h>' when appropriate	2019-07-25 16:06:54 +00:00
samsung	arch/non-x86: Flip HAVE_MONOTONIC_TIMER default	2019-07-09 13:07:38 +00:00
sifive	arch/non-x86: Flip HAVE_MONOTONIC_TIMER default	2019-07-09 13:07:38 +00:00
ucb	lib: Rewrite qemu-armv7 ramdetect	2019-07-28 11:31:42 +00:00