7fcb376982
There are four GPIO communities in this SOC and they are implemented as separate ACPI devices. This means the pin number that is used in an ACPI GPIO declaration needs to be relative to the community that the pin resides in. Also select GENERIC_GPIO_LIB in the SOC Kconfig so this function actually gets used. This was tested on the reef mainboard by verifying the output of the SSDT for the Maxim 98357A codec that the assigned GPIO_76 is listed as pin 0x24 which is the value relative to the Northwest community. BUG=None BRANCH=None TEST=None Change-Id: Iad2ab8eccf4c91185a075ffce8d41c81f06c1113 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://review.coreboot.org/15513 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Tested-by: build bot (Jenkins) Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/358585 Reviewed-by: Martin Roth <martinroth@chromium.org> |
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| .. | ||
| apollolake | ||
| baytrail | ||
| braswell | ||
| broadwell | ||
| common | ||
| fsp_baytrail | ||
| fsp_broadwell_de | ||
| quark | ||
| sch | ||
| skylake | ||