coreboot/src/northbridge/intel
Paul Menzel 7f5a1eeb24 Spell *Boot Guard* with a space for official spelling
See for example Intel document *Secure the Network Infrastructure –
Secure Boot Methodologies* [1].

Change all occurrences with the command below:

    $ git grep -l BootGuard | xargs sed -i 's/BootGuard/Boot Guard/g'

[1]: https://builders.intel.com/docs/networkbuilders/secure-the-network-infrastructure-secure-boot-methodologies.pdf

Change-Id: I69fb64b525fb4799bcb9d75624003c0d59b885b5
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-12-16 14:17:36 +00:00
..
common nb/intel/common: Replace _bar_clrsetbits_impl macro 2021-05-03 07:38:52 +00:00
e7505 Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
gm45 Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
haswell Spell *Boot Guard* with a space for official spelling 2021-12-16 14:17:36 +00:00
i440bx Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
i945 Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
ironlake Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
pineview Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00
sandybridge nb/intel/sandybridge/romstage.c: Configure DPR and initialize TXT 2021-12-02 17:41:07 +00:00
x4x Rename ECAM-specific MMCONF Kconfigs 2021-11-10 17:24:16 +00:00