coreboot/src
Marc Jones 7f2c29b6d6 amd/pi/hudson: Add config option for ACPI base
Add a configuration option to assign the binaryPI base address
for the ACPI registers. The binaryPI's assignment is determine
at build time and no run-time configuration is allowed.

Change-Id: Ida17022abfa6faceb0653c2cb87aacce4facef09
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19485
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-02 05:17:16 +02:00
..
acpi
arch arch/x86: Share storage data structures between early stages 2017-05-01 17:37:59 +02:00
commonlib commonlib: Add ID for STORAGE_DATA 2017-04-28 19:56:11 +02:00
console console: rework log level to not be reliant on ROMSTAGE_CONST 2017-04-25 18:13:56 +02:00
cpu nb/amd/amdk8: Link reset_test.c 2017-04-28 17:17:40 +02:00
device pci_device: Write vendor ID to subsystem vendor ID 2017-05-01 01:06:02 +02:00
drivers drivers/intel/fsp2_0: add option to incorporate platform memory version 2017-04-28 15:56:49 +02:00
ec ec/roda/it8518: Do EC write manually with long timeout 2017-04-08 13:17:56 +02:00
include nb/amdk8: Link coherent_ht.c 2017-04-28 17:20:51 +02:00
lib cbmem_console: Document known reimpementations of console structure/API 2017-04-26 01:31:51 +02:00
mainboard mb/*/mainboard.c: Get rid of SPI AFC register 2017-05-01 14:02:19 +02:00
northbridge amd/pi/00670F00: Reserve A0000-FFFFF 2017-05-02 05:16:38 +02:00
soc soc/intel/common/block: Add Intel common FAST_SPI code 2017-05-01 16:26:26 +02:00
southbridge amd/pi/hudson: Add config option for ACPI base 2017-05-02 05:17:16 +02:00
superio superio/fintek: Add support for Fintek F71808A 2017-03-27 19:19:56 +02:00
vboot vboot: Separate board name and version number in FWID with a dot 2017-04-29 01:44:10 +02:00
vendorcode Kconfig: provide MAINBOARD_HAS_TPM_CR50 option 2017-04-24 22:02:55 +02:00
Kconfig include: Add xmalloc, xzmalloc and dma routines 2017-04-25 00:52:03 +02:00