coreboot/src
David Hendricks 7efdf3feff pit: set up the PMIC correctly
This updates the setup_power() function to actually set up the PMIC
which is on this board (the MAX77802).

BUG=chrome-os-partner:19420
BRANCH=none
TEST=TODO...

Change-Id: I686740cc34e40256c6607132ec7a94d5156b5d55
Reviewed-on: https://gerrit.chromium.org/gerrit/58763
Commit-Queue: David Hendricks <dhendrix@chromium.org>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: David Hendricks <dhendrix@chromium.org>
2013-06-18 20:31:34 -07:00
..
arch armv7a: Enable native memcpy / memset 2013-06-17 18:35:45 -07:00
console ARM: Separate the early console (romstage) from the bootblock console. 2013-06-13 21:15:40 -07:00
cpu ARM: when setting a GPIO to put, set the value, then the direction 2013-06-18 16:12:07 -07:00
device Clean up POST codes for Boot State machine 2013-06-10 18:08:24 -07:00
drivers max77802: add header for max77802 PMIC 2013-06-18 17:08:17 -07:00
ec ec: Reserve correct ioport regions for Chrome OS EC to use 2013-06-12 14:02:10 -07:00
include ARM: Separate the early console (romstage) from the bootblock console. 2013-06-13 21:15:40 -07:00
lib Make elog_shrink not depend on having seperate memory/flash descriptors. 2013-06-14 16:15:30 -07:00
mainboard pit: set up the PMIC correctly 2013-06-18 20:31:34 -07:00
northbridge haswell: Update pei_data to match ref code 2013-06-04 12:53:42 -07:00
southbridge lynxpoint: update EHCI pci ids 2013-06-13 22:16:10 -07:00
superio Drop prototype guarding for romcc 2013-05-10 11:55:20 -07:00
vendorcode vboot: use out_flags to indicate recovery mode 2013-06-04 12:53:47 -07:00
Kconfig BACKPORT: x86: add thread support 2013-05-15 11:19:50 -07:00