coreboot/payloads/libpayload/arch/riscv
Ziang Wang 82f9c593ab payloads/libpayload: Add support for RISC-V 64-bit architecture
This patch adds config ARCH_RISCV_RV64 to support build of riscv64
payloads. New files under arch/riscv contain:
- Basic ldscript and payload entry point.
- Functions for riscv64 io and cache operations.
- Default timer code based on mtime delegation.
- Default cb_header_ptr passing with device tree to payload.

Change-Id: Ieb3d456d5edda87a3a4886ccfc17a7824c630427
Signed-off-by: Ziang Wang <wangziang.ok@bytedance.com>
Signed-off-by: Dong Wei <weidong.wd@bytedance.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/89646
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2026-01-07 00:31:24 +00:00
..
cache.c payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
coreboot.c payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
head.S payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
Kconfig payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
libpayload.ldscript payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
main.c payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
Makefile.mk payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
sysinfo.c payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
timer.c payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
util.S payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00
virtual.c payloads/libpayload: Add support for RISC-V 64-bit architecture 2026-01-07 00:31:24 +00:00