Felix Held 7a92e3895f soc/amd/picasso/agesa_acpi: add cast before right shift ... Without the cast the left shift is done on a 32 bit variable that gets extended to 64 bits afterwards which results in missing MSBs. To avoid this, do the cast to 64 bits before the left shift. Found-by: Coverity CID 1443793, 1443794 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I7cfa5b9b6ad71f36445ae2fa35140a8713288267 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50778 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>		2021-02-17 15:45:57 +00:00
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cezanne	soc/amd/cezanne/uart: write ACPI tables	2021-02-17 10:35:26 +00:00
common	soc/amd/picasso/uart: move uart_inject_ssdt to common code	2021-02-17 10:35:22 +00:00
picasso	soc/amd/picasso/agesa_acpi: add cast before right shift	2021-02-17 15:45:57 +00:00
stoneyridge	soc/amd/*/iomap: remove unused ACPI_SMI_CTL_PORT	2021-02-17 00:28:57 +00:00
Kconfig