coreboot/src/soc
Sean Rhodes 7a82a805b8 soc/intel/apollolake: Allow configuring the LPC IO registers
Allow configuring the LPC IO registers in the devicetree with:
* gen1_dec
* gen2_dec
* gen3_dec
* gen4_dec

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I2a7ab3faf927cda76640227feff4e19017442897
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64889
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-06-20 12:02:35 +00:00
..
amd soc/amd/smm_relocate.c: Improve TSEG programming 2022-06-17 15:27:21 +00:00
cavium Replace some ENV_ROMSTAGE with ENV_RAMINIT 2022-06-07 12:53:19 +00:00
example arch/x86: Add a common romstage entry 2022-06-07 12:54:39 +00:00
intel soc/intel/apollolake: Allow configuring the LPC IO registers 2022-06-20 12:02:35 +00:00
mediatek soc/mediatek: pass access mode to the payload 2022-06-12 22:28:37 +00:00
nvidia soc/*: Use __fallthrough statement 2022-05-11 06:04:25 +00:00
qualcomm sc7180: Trogdor to support 2 dcb 2022-06-01 18:05:38 +00:00
rockchip soc/*: Use __fallthrough statement 2022-05-11 06:04:25 +00:00
samsung i2c: Add configurable I2C transfer timeout 2022-03-15 22:06:27 +00:00
sifive Replace some ENV_ROMSTAGE with ENV_RAMINIT 2022-06-07 12:53:19 +00:00
ti treewide: Remove "ERROR: "/"WARN: " prefixes from log messages 2022-02-07 23:29:09 +00:00
ucb