coreboot/spd/lp5/set-1
Roger Wang 9992a98c67 spd/lp5: Add Hynix memory part
Add Micron memory part H58G56CK8BX146 to LP5 global list.
And Regenerate the SPD files for the SoC. The specification
is attached in issue tracker.

BUG=b:367841051
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Change-Id: I2a003aad32bca9ae5438973ecf0d7872481fee20
Signed-off-by: Roger Wang <roger2.wang@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85371
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2024-11-30 05:03:59 +00:00
..
parts_spd_manifest.generated.txt spd/lp5: Add Hynix memory part 2024-11-30 05:03:59 +00:00
spd-1.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-2.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-3.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-4.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-5.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-6.hex util/spd_tools/spd_gen/lp5: Remove maxSpeed for Sabrina 2022-08-01 20:30:39 +00:00
spd-7.hex spd/lp5: Re-generate the SPD data 2022-10-28 12:06:29 +00:00
spd-8.hex spd/lp5: Re-generate the SPD data 2022-10-28 12:06:29 +00:00
spd-9.hex spd/lp5: Add SPD for Samsung K3KL6L60GM-MGCT 2023-03-02 11:43:31 +00:00
spd-10.hex spd/lp5: Modify Hynix LPDDR5X memory Speed 2023-03-04 04:35:50 +00:00
spd-11.hex spd/lp5: Modify Hynix LPDDR5X memory Speed 2023-03-04 04:35:50 +00:00
spd-empty.hex spd/lp5: Generate initial SPDs for Sabrina SoC 2022-02-10 12:50:19 +00:00