coreboot/src/soc
Matt DeVillier 9cc1603173 soc/amd/stoneyridge: Add SMMSTORE support
Add SMMSTORE support for saving EFI NVRAM variables in
conjunction with Tianocore payload.

Test: build/boot several google/kahlee variants, test
manipulation and persistence of Tianocore bootorder variables.

Change-Id: Ida604a44d1fa5288e96dbe05de1f847e597cc95d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-01-20 10:50:06 +00:00
..
amd soc/amd/stoneyridge: Add SMMSTORE support 2020-01-20 10:50:06 +00:00
cavium soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h> 2019-12-19 05:38:43 +00:00
intel soc/intel/cannonlake/bootblock: Add CML-S 2/4-Core MCH IDs 2020-01-18 12:03:17 +00:00
mediatek soc/mediatek/mt8183: Restore vcore after DRAM calibration 2020-01-10 14:47:59 +00:00
nvidia src/soc/nvidia: Remove unused <stdlib.h> 2019-12-19 04:06:52 +00:00
qualcomm soc/qualcomm/qcs405: Remove unused QCS405_BLSP_SPI 2020-01-02 14:31:31 +00:00
rockchip src: Replace min/max() with MIN/MAX() 2019-12-20 17:49:29 +00:00
samsung src/soc/samsung: Remove unused <stdlib.h> 2019-12-19 05:39:09 +00:00
sifive src: Replace min/max() with MIN/MAX() 2019-12-20 17:49:29 +00:00
ucb mb/emulation/qemu-riscv: Implement ipi using clint to enable smp in qemu/spike. 2019-12-06 15:09:48 +00:00