coreboot/src
Jeremy Compostella 79c09ba3b6 soc/intel/mtl: Display Sign-of-Life message using FSP-M
Meteor Lake Firmware Support Package (FSP-M) for ChromeOS includes an
pre-memory graphics driver which can be leveraged to display a text
message thanks to the following FSP-M UPD (Updateable Product Data):

- VgaInitControl (bitfield):

  Bit 0: Turn on graphics, setup VGA text mode and display
         `VgaMessage' text centered on the screen.

  Bit 1: Clear text and tear down VGA text mode and graphics before
         returning from FSP-M.

- VbtPtr (address): Pointer to the VBT (Video BIOS Tables) binary.

- VbtSize (unsigned int): Size of the VBT binary.

- LidStatus (boolean): Due to limited resources at early boot stages,
  the text message is displayed on a single monitor. The lid status
  helps decide which display is the most appropriate.

  0: Lid is closed: show the text message on the external display if
     available, do not display anything otherwise.

  1: Lid is open: show the message on the internal display if
     available, use an external display if available otherwise.

- VgaMessage (string): Text message to display.

If the `SOC_INTEL_METEORLAKE_SIGN_OF_LIFE' flag is set, coreboot
configures the UPDs above to display a text message during memory
training and CSME update. The text message can be configured via the
locale text mechanism using the `memory_training_desc' name.

The `SOC_INTEL_METEORLAKE_SIGN_OF_LIFE' selects the LZ4 compression
algorithm for VBT because LZMA decompression is not available in
romstage by default and adding LZMA support increases the romstage
binary size more than the VBT binary is reduced.

BUG=b:279173035
TEST=Text message is displayed during memory training on a rex board

Change-Id: I8e7772582b1895fa8e38780932346683be998558
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78244
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <ericllai@google.com>
2023-12-11 05:07:23 +00:00
..
acpi acpi.c: Fix generating pointer to cb_tables located >4G 2023-12-08 14:02:45 +00:00
arch arch/riscv/payload: Remove old RISC-V CSR names 2023-12-09 15:27:36 +00:00
commonlib vendorcode/amd/opensil: Add initial setup and API calls 2023-12-06 18:32:58 +00:00
console Allow to build romstage sources inside the bootblock 2023-11-09 13:20:18 +00:00
cpu cpu/intel/model_206ax: Use macro IS_IVY_CPU 2023-12-04 15:54:45 +00:00
device device/Kconfig: rename AZALIA_PLUGIN_SUPPORT to AZALIA_HDA_CODEC_SUPPORT 2023-11-10 15:27:58 +00:00
drivers drivers: spi_flash: Add space before colon to fix coding style 2023-11-16 11:59:20 +00:00
ec ec/lenovo/h8/acpi/thermal: Make NameSeg FPWR all upper case 2023-12-04 17:53:40 +00:00
include acpi/acpi_gic: Add GIC ITS subtable 2023-12-06 13:07:27 +00:00
lib lib/device_tree.c: Fix print_property 2023-11-16 12:01:40 +00:00
mainboard Revert "nipperkin: Fix WLAN to GEN2 speed" & "Disable PSPP for WLAN" 2023-12-08 16:33:02 +00:00
northbridge sb/intel/bd82x6x: assign EHCI controller ops in chipset devicetree 2023-12-06 16:20:24 +00:00
sbom sbom/Makefile.inc: Change GOPATH 2023-11-20 14:32:54 +00:00
security Makefile: Make vboot_fw.a a .PHONY target 2023-12-08 17:44:38 +00:00
soc soc/intel/mtl: Display Sign-of-Life message using FSP-M 2023-12-11 05:07:23 +00:00
southbridge sb/intel/bd82x6x: assign EHCI controller ops in chipset devicetree 2023-12-06 16:20:24 +00:00
superio superio/smsc: Add support for the SCH555x series 2023-12-01 17:40:11 +00:00
vendorcode vc/intel/fsp/mtl: Update header files from 3323_86 to 3424_88 2023-12-11 05:05:17 +00:00
Kconfig Allow to build romstage sources inside the bootblock 2023-11-09 13:20:18 +00:00