coreboot/src/soc
Felix Singer d60abfcb74 soc/intel/skylake: Shorten SATA mode enum value names
The Skylake FSP isn't used by coreboot anymore. Therefore, drop the
misleading comment and the "KBLFSP" extension from the names of these
enums.

Also, drop the "MODE" extension to make their names shorter in general,
since it doesn't add any more value.

Built clevo/n130wu with BUILD_TIMELESS=1, coreboot.rom remains
identical.

Change-Id: If37d40e4e1dfd11e9315039acde7cafee0ac60f0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48377
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-12-08 20:50:27 +00:00
..
amd soc/amd/picasso: drop unused cpu/amd/mtrr from Makefile 2020-12-06 20:10:11 +00:00
cavium cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
example x86: Add a minimal example SoC along with a board 2020-10-30 21:34:18 +00:00
intel soc/intel/skylake: Shorten SATA mode enum value names 2020-12-08 20:50:27 +00:00
mediatek cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
nvidia cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
qualcomm cbfs: Simplify load/map API names, remove type arguments 2020-12-02 22:13:17 +00:00
rockchip cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
samsung cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
sifive cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
ti cbfs: Enable CBFS mcache on most chipsets 2020-12-02 22:12:10 +00:00
ucb soc/ucb/riscv: Add chip_operations stub 2020-05-28 09:30:35 +00:00