erebion/coreboot
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
coreboot/src/soc/intel
History
Jeremy Compostella 782ae11bc7 soc/intel/cmn/blk/cnvi: Add _PRR method for Bluetooth CNVi Reset 
The change introduces new Advanced Configuration and Power Interface
(ACPI) methods to handle Bluetooth device states, including status
checks and device reset procedures. Specifically, it adds a Power
Resource for Reset (_PRR) method and the associated power resources to
enable Operating System (OS)-level resets for Connectivity Integrated
(CNVi) Bluetooth devices as specified in Intel document
number 559910. This allows the OS to perform Bluetooth hardware recovery
in case of errors, ensuring compliance with Intel's standards. The Power
Resource ACPI code was adapted from Panther Lake (PTL) Firmware Support
Package (FSP) revision 3144.01.

The new ACPI Bluetooth code introduces the CNMT mutex, similar to the
USB Bluetooth ACPI code, to avoid simultaneous CNVi resets when
executing Wi-Fi and Bluetooth power resource _RST methods.

TEST=The following two use cases were verified using acpidbg on a Fatcat
     device.
     1. Test CNVi Bluetooth _RST() completion.
        acpidbg -b 'evaluate \_SB.PCI0.CNVB.PRRS' # 0x0
        acpidbg -b 'evaluate \_SB.PCI0.CNVB.RSTT' # 0x0
        acpidbg -b 'set N \_SB.PCI0.CNVB.RSTT 1'  # 0x1
        acpidbg -b 'evaluate \_SB.PCI0.CNVB.CNVP._RST'
        acpidbg -b 'evaluate \_SB.PCI0.CNVB.PRRS' # 0x2
     2. Test that CNVi Wi-Fi _RST calls CNVi Bluetooth CFLR method.
        acpidbg -b 'evaluate \_SB.PCI0.CNVB.PRRS' # 0x0
        acpidbg -b 'evaluate \_SB.PCI0.CNVW.RSTT' # 0x0
        acpidbg -b 'set N \_SB.PCI0.CNVW.RSTT 1'  # 0x0
        acpidbg -b 'evaluate \_SB.PCI0.CNVW.CNVP._RST'
        acpidbg -b 'evaluate \_SB.PCI0.CNVB.PRRS' # 0x1

Change-Id: I2389901faf4fad131bb7226e356b47f4b1a4ddac
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88111
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.corp-partner.google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2025-06-23 16:20:50 +00:00
..
alderlake drivers/intel/fsp2_0: Refactor bitmap loading and GOP BLT conversion 2025-06-23 02:03:59 +00:00
apollolake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
baytrail soc/intel/baytrail: Add microcode for '06-37-08' SOCs 2025-02-03 18:59:45 +00:00
braswell tree: Handle NULL pointer returned by smm_get_save_state() 2025-01-20 03:26:26 +00:00
broadwell soc/intel/broadwell: Add CFR objects for existing options 2025-04-25 14:24:27 +00:00
cannonlake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
common soc/intel/cmn/blk/cnvi: Add _PRR method for Bluetooth CNVi Reset 2025-06-23 16:20:50 +00:00
denverton_ns tree: remove duplicated includes 2025-04-20 05:13:57 +00:00
elkhartlake soc/intel/elkhartlake: Hook up S0ix setting to option API 2025-05-08 12:27:06 +00:00
jasperlake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
meteorlake drivers/intel/fsp2_0: Refactor bitmap loading and GOP BLT conversion 2025-06-23 02:03:59 +00:00
pantherlake drivers/intel/fsp2_0: Refactor bitmap loading and GOP BLT conversion 2025-06-23 02:03:59 +00:00
skylake soc/intel/skylake: Add/use enums for IGD config 2025-05-14 18:13:12 +00:00
snowridge soc/intel/common/block: Add const qualifier for input of pirq ops 2024-12-09 13:55:53 +00:00
tigerlake soc/intel: Move CNVI sideband definitions to SoC-specific files 2025-06-16 10:37:49 +00:00
xeon_sp soc/intel/xeon_sp: Use Kconfig to define SPI_BASE_ADDRESS 2025-06-13 15:23:42 +00:00
Makefile.mk