coreboot/src/soc/intel
Ben Gardner 77e351d9d1 intel/fsp_baytrail: Fix I2C abort logic
A call to i2c_read() for a non-existent address followed by an i2c_read()
to a valid address results in a false abort status for the 2nd call.

i2c_read(1, 0x40, 0, buf, sizeof(buf)) => 0x2000000 (I2C_ERR_TIMEOUT)
i2c_read(1, 0x74, 0, buf, sizeof(buf)) => 0x4000000 (I2C_ERR_ABORT)

Because the abort status register is cleared on read and wait_tx_fifo()
reads it twice, the returned status does not contain the abort status.
Fixing that changed the 2nd read to reflect the abort status.

i2c_read(1, 0x40, 0, buf, sizeof(buf)) => 0x2000000 (I2C_ERR_TIMEOUT)
i2c_read(1, 0x74, 0, buf, sizeof(buf)) => 0x4000001 (I2C_ERR_ABORT)

Bit 0 indicates that the address was not acknowledged by any slave.
That's the abort status from the previous transaction.
So I added a read of the abort status before starting a transaction in
both i2c_read() and i2c_write().

i2c_read(1, 0x40, 0, buf, sizeof(buf)) => 0x2000000 (I2C_ERR_TIMEOUT)
i2c_read(1, 0x74, 0, buf, sizeof(buf)) => 0 (I2C_SUCCESS)

Tested on a Bay Trail E3845 SoC.

Change-Id: I39e4ff4206587267b6fceef58f4a567bf162fbbe
Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-on: https://review.coreboot.org/14160
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2016-03-25 18:24:49 +01:00
..
apollolake soc/intel/apollolake: utilize postcar phase/stage 2016-03-23 14:24:44 +01:00
baytrail x86 chipsets: utilize x86_setup_mtrrs_with_detect() 2016-03-08 23:58:01 +01:00
braswell x86 chipsets: utilize x86_setup_mtrrs_with_detect() 2016-03-08 23:58:01 +01:00
broadwell x86 chipsets: utilize x86_setup_mtrrs_with_detect() 2016-03-08 23:58:01 +01:00
common soc/intel/common: Use SoC specific routine to read/write MTRRs 2016-02-02 19:00:35 +01:00
fsp_baytrail intel/fsp_baytrail: Fix I2C abort logic 2016-03-25 18:24:49 +01:00
quark soc/intel/quark: Disable the ROM shadow 2016-03-21 19:46:59 +01:00
skylake intel/skylake: Do not log wake source on reset 2016-03-12 09:23:15 +01:00