coreboot/src
Nico Huber 772a154d39 nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE
We keep the support, though. Just now that `libgfxinit` is fixed, we
don't need the distinction anymore. Causally, we also don't need
CPU_INTEL_MODEL_306AX any more.

TEST=Played tint on kontron/ktqm77. Score 606

Change-Id: Id1e33c77f44a66baacba375cbb2aeb71effb7b76
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32737
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2019-05-12 15:03:03 +00:00
..
acpi
arch nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE 2019-05-12 15:03:03 +00:00
commonlib vboot: include vb2_sha.h when required 2019-05-09 06:32:44 +00:00
console Fix code that would trip -Wtype-limits 2019-05-06 10:32:15 +00:00
cpu nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE 2019-05-12 15:03:03 +00:00
device device: ignore NONE devices behind bridge 2019-05-07 16:05:27 +00:00
drivers nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE 2019-05-12 15:03:03 +00:00
ec ec/lenovo/h8: Add VBOOT board support 2019-05-08 10:27:36 +00:00
include boot_device: Constify argument 2019-05-12 07:47:45 +00:00
lib boot_device: Constify argument 2019-05-12 07:47:45 +00:00
mainboard nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE 2019-05-12 15:03:03 +00:00
northbridge nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE 2019-05-12 15:03:03 +00:00
security vboot: Turn vboot_logic_executed() into a static inline 2019-05-10 21:43:15 +00:00
soc soc/intel/cnl: Enable VT-d 2019-05-11 11:16:48 +00:00
southbridge nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE 2019-05-12 15:03:03 +00:00
superio superio/fintek/f71808a: Add more optional ramstage registers 2019-05-01 00:09:57 +00:00
vendorcode vendorcode/google/chromeos: Use explicit zero check in ACPI code 2019-05-09 15:34:53 +00:00
Kconfig Kconfig: Create RAMPAYLOAD kconfig 2019-05-12 03:10:24 +00:00