coreboot/src/soc/intel
Michał Żygowski 7357f2a0ff soc/intel/alderlake: Fix incorrect microcode comments
The microcode for RPL-S C0 and H0 is actually available, however, the
name of the file contained a typo: 06-b7-05 vs 06-bf-05. Fix the typos
in the comments.

Moreover, the ADL-S C0/H0 microcode file 06-97-05 has the same sha256
sum as the equivalent RPL-S C0/H0 microcode file 06-bf-05. The sha256
sum of ADL-S/RPL-S C0/H0 microcode on intel-microcode tag
microcode-20230808:

5d8d4a4d5456c43b7cc04937c80aec094ccbf3bd89f34ffa5182913ef944a9f9

Update the comments to correctly indicate supported CPU steppings.

Change-Id: I4c848e0dfc40f6c8e26a9b31e7c4cf4c5a09128f
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78413
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-10-19 09:44:32 +00:00
..
alderlake soc/intel/alderlake: Fix incorrect microcode comments 2023-10-19 09:44:32 +00:00
apollolake Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
baytrail soc/intel: Remove space between function name and '(' 2023-09-11 21:39:08 +00:00
braswell soc: Remove SOC_SPECIFIC_OPTIONS 2023-08-21 23:45:43 +00:00
broadwell soc/intel: Remove space between function name and '(' 2023-09-11 21:39:08 +00:00
cannonlake Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
common soc/intel/cmn/graphics: Implement API for IGD to join the MBUS 2023-10-18 05:47:18 +00:00
denverton_ns soc/intel/denverton_ns: Remove __attribute__(()) 2023-09-17 13:31:59 +00:00
elkhartlake Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
jasperlake Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
meteorlake soc/intel/mtl: Set slp-s0 counter frequency 2023-10-18 06:24:15 +00:00
skylake Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
tigerlake Kconfig: Bring HEAP_SIZE to a common, large value 2023-10-11 12:09:01 +00:00
xeon_sp soc/intel/xeon_sp/spr: Add SATA controllers 1 and 2 to devicetree 2023-10-13 13:51:50 +00:00
Makefile.inc soc/intel/Makefile.inc: Add comment where CONFIG_CSE_*_FILE are used 2023-09-22 15:48:08 +00:00