Mathew King 72cdbfa2f3 mb/amd/majolica: Enable USB ACPI in devicetree ... BUG=b:180529005 TEST=boot majolica, all USB ports work Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I6d3506bb4d54c7f8ea1e53576ef68d2aface6c89 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51256 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>		2021-03-11 01:17:09 +00:00
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acpi	acpi: Move PCI functions to separate file	2021-03-01 08:26:23 +00:00
arch	mb/ocp/deltalake: Fill ECC type in romstage	2021-03-01 08:22:28 +00:00
commonlib	cbfs: Add cbfs_alloc() primitive and combine cbfs_load() and cbfs_map()	2021-03-08 22:31:43 +00:00
console	console/vtxprintf.c: Add missing <types.h>	2021-02-16 08:15:26 +00:00
cpu	src/cpu: Remove unused symbols	2021-02-18 10:11:24 +00:00
device	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00
drivers	drivers/i2c: sx9310: Replace register map with descriptive names	2021-03-10 19:33:01 +00:00
ec	ec/system76/ec: Add OLED screen toggle	2021-02-27 09:38:19 +00:00
include	cbfs: Add cbfs_alloc() primitive and combine cbfs_load() and cbfs_map()	2021-03-08 22:31:43 +00:00
lib	cbfs: Add cbfs_alloc() primitive and combine cbfs_load() and cbfs_map()	2021-03-08 22:31:43 +00:00
mainboard	mb/amd/majolica: Enable USB ACPI in devicetree	2021-03-11 01:17:09 +00:00
northbridge	nb/intel/haswell: Finalize northbridge in ramstage	2021-03-10 10:59:36 +00:00
security	security/tpm/tss/vendor/cr50: Introduce vendor sub-command to reset EC	2021-03-05 10:57:01 +00:00
soc	soc/amd/cezanne: Add USB ports to chipset.cb	2021-03-10 23:47:03 +00:00
southbridge	nb/intel/haswell: Finalize northbridge in ramstage	2021-03-10 10:59:36 +00:00
superio	superio/smsc/sch5545: Add missing <types.h>	2021-02-13 22:06:28 +00:00
vendorcode	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2081_02	2021-03-10 20:30:20 +00:00
Kconfig	southbridge: Ensure common Kconfig gets included last	2021-02-18 10:11:39 +00:00