Martin Roth 7266c5ec84 soc/amd/common: Change default spi speeds to 33MHz ... In CB:56884 we discussed changing the default fast_read speed from 66MHz, which some platforms may not be capable of running, to 33MHz, which should be generally suitable for all platforms. This same change has been applied to the default for all SPI speeds. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Ibf926df6829ffdcbae947aaa245356f219615ce8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/57148 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2021-09-01 00:52:20 +00:00
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acpi	soc/amd/common/upep.asl: Correct device list format	2021-08-18 15:06:32 +00:00
block	soc/amd/common: Change default spi speeds to 33MHz	2021-09-01 00:52:20 +00:00
fsp	soc/amd/common/fsp/Makefile: drop strip_quotes call in FSP-M size check	2021-08-30 13:44:36 +00:00
psp_verstage	soc/amd/common: Skip psp_verstage on S0i3 resume	2021-08-20 15:14:32 +00:00
vboot	amd/vboot: remove bl_syscall_public.h from include	2021-04-23 16:33:44 +00:00
Kconfig.common	soc/amd/picasso: Move Type 17 DMI generation to common	2021-06-13 09:55:30 +00:00
Makefile.inc