soc/intel/cmn/sa: Store TOM into the CMOS
This patch uses the IA common code API to store the top_of_ram (TOM)
address intonon-volatile space (CMOS).
The code logic will update the TOM address in CMOS NVS if the
`top_of_ram` address is calculated differently in any boot and
also takes care of caching the updated range.
TEST=Able to build and boot google/rex to ChromeOS.
First boot:
Before calling into FSP-M
[DEBUG] 0x00000000fef00006: PHYBASE0: Address = 0x00000000fef00000, WB
[DEBUG] 0x00003ffffff80800: PHYMASK0: Length = 0x0000000000080000, Valid
[DEBUG] 0x00000000fef80006: PHYBASE1: Address = 0x00000000fef80000, WB
[DEBUG] 0x00003ffffffc0800: PHYMASK1: Length = 0x0000000000040000, Valid
[DEBUG] 0x00000000ff000005: PHYBASE2: Address = 0x00000000ff000000, WP
[DEBUG] 0x00003fffff000800: PHYMASK2: Length = 0x0000000001000000, Valid
[DEBUG] 0x00000000f9800005: PHYBASE3: Address = 0x00000000f9800000, WP
[DEBUG] 0x00003fffff800800: PHYMASK3: Length = 0x0000000000800000, Valid
...
[DEBUG] tom_table invalid signature
[DEBUG] top_of_ram = 0x76000000
[DEBUG] Updated the TOM address into CMOS 0x76000000
On consecutive boot:Before calling into FSP-M:
The TOM region is already cached.
[DEBUG] 0x00000000fef00006: PHYBASE0: Address = 0x00000000fef00000, WB
[DEBUG] 0x00003ffffff80800: PHYMASK0: Length = 0x0000000000080000, Valid
[DEBUG] 0x00000000fef80006: PHYBASE1: Address = 0x00000000fef80000, WB
[DEBUG] 0x00003ffffffc0800: PHYMASK1: Length = 0x0000000000040000, Valid
[DEBUG] 0x00000000ff000005: PHYBASE2: Address = 0x00000000ff000000, WP
[DEBUG] 0x00003fffff000800: PHYMASK2: Length = 0x0000000001000000, Valid
[DEBUG] 0x00000000f9800005: PHYBASE3: Address = 0x00000000f9800000, WP
[DEBUG] 0x00003fffff800800: PHYMASK3: Length = 0x0000000000800000, Valid
[DEBUG] 0x0000000075000005: PHYBASE4: Address = 0x0000000075000000, WP
[DEBUG] 0x00003fffff000800: PHYMASK4: Length = 0x0000000001000000, Valid
Change-Id: I2569495570652c488096f6a29f58dd8f0103af9d
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73273
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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