Filip Lewiński 95461ee3df Documentation/soc/intel/redundancy.md: add ... Add documentation for the Intel PCH Top Swap based A/B redundancy mechanism. Describe the BOOTBLOCK and TOPSWAP bootblock regions, COREBOOT and COREBOOT_TS CBFS regions, the attempt_slot_b CMOS option and its application time, and how the active CBFS region is selected based on the Top Swap state. This follows the A/B redundancy proposal discussed on the coreboot mailing list: https://mail.coreboot.org/archives/list/coreboot@coreboot.org/thread/C6JN2PB7K7D67EG7OIKB6BBERZU5YV35/ Change-Id: I1b88989201e209b2f69964c067c432ff82a0057e Signed-off-by: Filip Lewiński <filip.lewinski@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/90412 Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2026-02-10 21:13:57 +00:00
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amd	soc/amd/common: Add comments about bootblock	2025-07-23 17:01:19 +00:00
cavium	Docs: Replace Recommonmark with MyST Parser	2024-03-21 16:11:56 +00:00
intel	Documentation/soc/intel/redundancy.md: add	2026-02-10 21:13:57 +00:00
qualcomm	Docs: Replace Recommonmark with MyST Parser	2024-03-21 16:11:56 +00:00
index.md	Docs: Replace Recommonmark with MyST Parser	2024-03-21 16:11:56 +00:00