coreboot/src
Wenkai Du 71ee2fd470 broadwell: add ROM stage pre console init call back
Serial port on ITE 8772 SuperIO must be initialized before
console_init is called. So the pre console init callback
is added to let mainboard code do proper initialization.

Change-Id: I594e6e4a72f65744deca5cad666eb3b227adeb24
Signed-off-by: Wenkai Du <wenkai.du@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/227933
Reviewed-by: Kenji Chen <kenji.chen@intel.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Rajmohan Mani <rajmohan.mani@intel.com>
Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org>
2014-11-07 01:24:07 +00:00
..
arch timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
console console: add configs to support Marvell bg4cd uart 2014-10-17 03:24:42 +00:00
cpu timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
device PCIe: Add L1 Sub-State support. 2014-10-10 04:36:50 +00:00
drivers tpm: Add ramstage driver and interrupt configuration 2014-11-03 22:09:50 +00:00
ec chromeec: Add wakeup delay after SPI /CS assertion 2014-10-01 06:53:27 +00:00
include timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
lib timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
mainboard timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
northbridge Makefile: Preprocess linker scripts and other general improvements 2014-10-02 07:02:10 +00:00
soc broadwell: add ROM stage pre console init call back 2014-11-07 01:24:07 +00:00
southbridge timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS 2014-11-07 01:24:01 +00:00
superio superio: ite8772f: Exit extemp busy state 2014-09-27 07:09:25 +00:00
vendorcode vboot: adding VBSD_BOOT_FIRMWARE_WP_ENABLED logic 2014-11-06 02:28:12 +00:00
Kconfig memlayout: Add TIMESTAMP region 2014-11-04 21:34:36 +00:00