coreboot/src
Eric Lai 71a488d428 mb/google/brya/var/ghost: Enable AMP power
Follow latest schematic, GPP_A17 is used to enable AMP power.

BUG=b:240006200
BRANCH=firmware-brya-14505.B
TEST=Check I2C scan can see the AMP return ACK.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ia6c52302a12ddec68303714ac07e96a65a8f8fb8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66325
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
2022-08-02 17:14:12 +00:00
..
acpi
arch arch/x86/acpi: Replace Store() with ASL 2.0 syntax 2022-07-30 00:11:58 +00:00
commonlib vc/google/elog: Record vboot FW boot information into elog 2022-08-02 07:06:30 +00:00
console
cpu arch/x86: Fix MAX_CPUS check proper for late X2APIC config 2022-07-25 10:06:18 +00:00
device
drivers drivers/elog: Use format string 2022-08-01 09:27:50 +00:00
ec ec/system76/ec: Provide charging thresholds by default 2022-07-16 22:48:06 +00:00
include include: Add SPDX-License-Identifiers to files missing them 2022-08-01 13:59:11 +00:00
lib lib/program_loaders.c: Mark run_ramstage with __noreturn 2022-07-14 23:10:17 +00:00
mainboard mb/google/brya/var/ghost: Enable AMP power 2022-08-02 17:14:12 +00:00
northbridge nb/amd: Fix some white spaces issues 2022-07-17 21:57:31 +00:00
security security/vboot: Simplify image signing 2022-07-30 18:29:25 +00:00
soc soc/intel/alderlake: Add IRQ constraints for CPU PCIe ports 2022-08-02 12:19:17 +00:00
southbridge sb/intel/bd82x6x/acpi: Replace LEqual(a,b) with ASL 2.0 syntax 2022-07-29 10:16:25 +00:00
superio
vendorcode vc/google/elog: Record vboot FW boot information into elog 2022-08-02 07:06:30 +00:00
Kconfig