coreboot/src/soc/intel
Marc Jones 70907b00e6 soc/intel/xeon_sp: Call common soc_get_num_cpus()
Use a common function to get the number of CPUs for each soc. This
removes a #if for different function names in the common code.

Change-Id: I3348d37fcae72247731e465ec2a65d9583a2f180
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2020-10-30 18:55:58 +00:00
..
alderlake mb/intel/adlrvp: Add dq_pins_interleaved into 'struct mb_cfg' 2020-10-29 10:49:03 +00:00
apollolake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
baytrail src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
braswell src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
broadwell soc/intel/broadwell: Drop reg-script to finalize PCH 2020-10-30 00:47:07 +00:00
cannonlake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
common soc/intel/common/block/usb4: Add TCSS XHCI driver for SSDT generation 2020-10-30 18:34:19 +00:00
denverton_ns src: Include <arch/io.h> when appropriate 2020-10-26 06:44:40 +00:00
elkhartlake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
icelake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
jasperlake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
quark arch/x86: Introduce ARCH_ALL_STAGES_X86_32 2020-09-26 11:42:28 +00:00
skylake soc/intel: deduplicate ACPI timer emulation 2020-10-28 21:28:19 +00:00
tigerlake soc/intel/tigerlake: Enable TCSS XHCI device and define port aliases 2020-10-30 18:34:30 +00:00
xeon_sp soc/intel/xeon_sp: Call common soc_get_num_cpus() 2020-10-30 18:55:58 +00:00
Kconfig fsp2_0: Gather Kconfig declarations 2020-04-05 23:26:24 +00:00