coreboot/src/cpu
Gang Chen 3d32f915a9 soc/intel/xeon_sp: Reserve PRMRR
PRMRR (Protected Region Memory Range Region) are not accessible as
normal DRAM regions and needs to be explicitly reserved in memory
map.

Change-Id: I81d17b1376459510f7c0d43ba4b519b1f2bd3e1f
Signed-off-by: Gang Chen <gang.c.chen@intel.com>
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Signed-off-by: Jincheng Li <jincheng.li@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84314
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2024-11-14 14:29:23 +00:00
..
amd treewide: Remove unused CHIPs 2024-02-20 11:01:36 +00:00
armltd arch to cpu: Add SPDX license headers to Kconfig files 2024-02-18 01:58:52 +00:00
intel tree: Include static.h for remaining devicetree usages 2024-11-10 19:12:22 +00:00
power9 include/device/device.h: Remove CHIP_NAME() macro 2024-01-31 09:51:58 +00:00
qemu-power8 include/device/device.h: Remove CHIP_NAME() macro 2024-01-31 09:51:58 +00:00
qemu-x86 mb/emulation/qemu: Configure TSEG size 2024-06-21 15:52:24 +00:00
via cpu/via: Implement cache as RAM 2024-11-11 09:17:11 +00:00
x86 soc/intel/xeon_sp: Reserve PRMRR 2024-11-14 14:29:23 +00:00
Kconfig arch to cpu: Add SPDX license headers to Kconfig files 2024-02-18 01:58:52 +00:00
Makefile.mk via: Start template for VIA C7 w/ CX700 northbridge 2024-11-11 09:16:55 +00:00